Quoting r. Grant Grundler ([EMAIL PROTECTED]) "Re: [openib-general] ip over ib throughtput": > On Tue, Jan 11, 2005 at 01:41:00PM -0800, Roland Dreier wrote: > > I think a full MSI update for tg3 would need a separate MSI interrupt > > routine that takes advantage of all the additional non-shared and > > ordering guarantees that MSI provides. > > That's the beauty of bcm57xx. The DMA/Intr ordering is handled by passing > tags back of forth - so the NIC knows which status block the host saw > on the current interrupt. It might result in a spurious interrupt > on occasion but very portable IMHO.
Does this mean that after MSI wa asserted, and before status is passed back, no more messages of the same kind are sent? mst _______________________________________________ openib-general mailing list [email protected] http://openib.org/mailman/listinfo/openib-general To unsubscribe, please visit http://openib.org/mailman/listinfo/openib-general
