Michael> Might be a good idea to test err == -EAGAIN first: err is
Michael> likely a register, and once you get a valid CQE returning
Michael> it to ULP ASAP has direct latency impact.
Makes sense. The x86_64 asm looks slightly better at least, so I put
this change in my tree.
Michael> I agree, neither do I. Did you have a chance to profile
Michael> this code? Is there any performance impact on IPoIB?
I didn't profile but I didn't measure any performance delta on IPoIB.
- R.
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