Hi, > This is horribly non-portable. How much of a performance difference > does it make? How does it do on ppc64 systems where the cacheline > size is not 32?
Yes, if anything we should catch cacheline aligned, multiple cacheline sized zeroing in memset. Anton _______________________________________________ openib-general mailing list [email protected] http://openib.org/mailman/listinfo/openib-general To unsubscribe, please visit http://openib.org/mailman/listinfo/openib-general
