On Sun, Mar 05, 2006 at 12:13:26PM +0200, Eli Cohen wrote:
> Add control of PCIX max read byte count and PCI Express max read
> request size parameters. This is due to the fact that some chipsets
> may not work or may not work optimally with the default parameters.
...
Good idea!
some nits below.
> +/* the PCIX max read byte count and PCI Express max read request size
> + parameters have default values as defined by the PRM which will
> + should give best performance in most cases. However there are some
> + chipsets that work better with other values or that do not work at
> + all with the default values */
> +enum {
> + PCIX_MAX_RBC_512,
> + PCIX_MAX_RBC_1024,
> + PCIX_MAX_RBC_2048,
> + PCIX_MAX_RBC_4096,
> + PCIX_MAX_RBC_INVALID
> +};
Why is this an enum?
> +static int pcix_max_rbc = PCIX_MAX_RBC_INVALID;
It's declared an int and is "user visible".
I think the user interface would be better served
if the user could just specify "pcix_max_rbc=2048"
instead of some magic value.
> +static int pcie_max_rrs = PCIE_MAX_RRS_INVALID;
ditto.
hth,
grant
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