On Fri, Aug 25, 2006 at 03:53:12PM -0400, Talpey, Thomas wrote:
> At 03:23 PM 8/25/2006, Greg Lindahl wrote:
> >On Fri, Aug 25, 2006 at 03:21:20PM -0400, [EMAIL PROTECTED] wrote:
> >
> >> I presume you meant invalidate the cache, not flush it, before
> >accessing DMA'ed
> >> data.
> >
> >Yes, this is what I meant. Sorry!
>
> Flush (sync for_device) before posting.
> Invalidate (sync for_cpu) before processing.
>
So, before touching the data that was RDMAed into the buffer application
should cache invalidate the buffer, is this even possible from user
space? (Not on x86, but it isn't needed there.)
> On some architectures, these operations flush and/or invalidate
> i/o pipeline caches as well. As they should.
>
> Tom.
--
Gleb.
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