David Miller wrote: > From: John Partridge <[EMAIL PROTECTED]> > Date: Wed, 01 Nov 2006 10:27:19 -0600 > > >>Sorry, but I find this change a bit puzzling. The problem is >>particular to the PPB on the HCA and not Altix. I can't see anywhere >>that a PCI Config Write is required to block until completion, it is >>the driver and the HCA ,not the Altix hardware that requires the >>Config Write to have completed before we leave mthca_reset() >>Changing pci_write_config_xxx() will change the behavior for ALL >>drivers and the possibility of breaking something else. The fix was >>very low risk in mthca_reset(), changing the PCI code to fix this is >>much more onerous. > > > The issue is that something as simple as: > > val = pci_read_config(REG); > val |= bit; > pci_write_config(REG, val); > newval = pci_read_config(REG); > BUG_ON(!(newval & bit)); > > is not guarenteed by PCI (aparently). > > I see no valid reason why every PCI device driver should > be troubled with this lunacy and the ordering should thus > be ensured by the PCI layer. > > It just so happens to take care of the original driver > issue too :-)
Yeah, Matthew has convinced me of that now. Thanks -- John Partridge Silicon Graphics Inc Tel: 651-683-3428 Vnet: 233-3428 E-Mail: [EMAIL PROTECTED] _______________________________________________ openib-general mailing list [email protected] http://openib.org/mailman/listinfo/openib-general To unsubscribe, please visit http://openib.org/mailman/listinfo/openib-general
