On 13/07/2026 09:09, YC Hsieh wrote: >>> + >>> + aspeed,lpc-interrupts: >>> + $ref: /schemas/types.yaml#/definitions/uint32-array >>> + minItems: 2 >>> + maxItems: 2 >>> + description: | >>> + A 2-cell property expressing the LPC SerIRQ number and the interrupt >>> + level/sense encoding (specified in the standard fashion). >>> + >>> + Note that the generated interrupt is issued from the BMC to the >>> host, and >>> + thus the target interrupt controller is not captured by the BMC's >> + devicetree. > >> No, you do not get second interrupts property. > > Understood. > > These values are not addressable resources of the BMC node itself; > rather, they describe how the BMC's LPC engine is exposed on the host > LPC bus. I am not sure how they should be represented in DT, since > they do not seem to fit the usual semantics of either "reg" or "interrupts". > > Do you have a preferred way to represent this kind of host-facing LPC > configuration in the binding?
How this device is expressed somewhere else (on some other system - "host") feels like outside of this device concern. Best regards, Krzysztof _______________________________________________ Openipmi-developer mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openipmi-developer
