Willie Chen wrote: > I changed the default CPU speed 211MHz to 400MHz. Thanks ! Setting CLKDIVN after the PLLs have settled looks a bit scary to me. This is a change from 1:3:6 down to 1:4:8, so we'd run with HCLK = 133MHz and PCLK = 66.7MHz for a while.
So I've moved the CLKDIVN update before the delay. Let's see if it still works ... yeah ! before: FCLK = 211 MHz, HCLK = 70 MHz, PCLK = 35 MHz, UCLK = 48 MHz after: FCLK = 400 MHz, HCLK = 100 MHz, PCLK = 50 MHz, UCLK = 48 MHz Committed as r3786. Thanks, - Werner
