Hi Andy: >>I didn't understand how the input mode can leak the current to allow 2V >>on GSM VDD? It makes me worry that by setting to 0V level, instead you >>allow current to flow into the 0V GPIO, hiding the problem. This is why >>VBAT shows "almost zero", current is in fact flowing through it into the >>0V GPIO pins. >>This proposed bad current path would be like this: >>(Secret Evil High Pin) --> [ GSM VDD ] --> ( 0V GPIO pins now ) >>You can confirm if my worry is correct by measuring the change in >>overall current -- you will find it is either no different or higher >>current is lost if my worry is correct -- in that case you didn't find >>the real problem yet -- "Secret Evil High Pin". >>Of course if the overall current is lower, congratulations instead!
I know what you worry, and I also know this possibility. I try to test some thing in u-boot, because I can change GPIO setting in U-boot. I remove B1701 (GSM power path) and the GSM does not have any power source .I set GPIO( TX, RX,CTS,RTS,INT0,IO1) to input mode. I still found VBAT ( GSM power) have 1.0Voltage. I check all GSM's pins connect to any chip (S3C2442,Audio Codec, download buffer).I start measuring these pins and I found the RX has 1.8V voltage. It is more than VBAT. Therefore, I just assume the RX is the source and I set these GPIO to low. The VBAT change to 0.001 V. I don't sure it is right. I already request Matt give me a suspend image to test it and I will check it again in suspend mode. Thanks for you point it. Best Wishes~ ______________________________________________ Allen Chang ( 張 吉 隆 ) First International Computer Inc. 7F, No.300, Yang Guang St., NeiHu, Taipei, 114, Taiwan Tel: +886-2-8751-8751 Ext: 6171 Fax: +886-2-8751-8739
