From: Sean McNeil <[EMAIL PROTECTED]>

Try to make sure about no compiler malarky by volatile.  Change hdq busy
detect.  Change error handling path in hdq interface to fiq.

Signed-off-by: Sean McNeil <[EMAIL PROTECTED]>
---

 drivers/power/gta02_hdq.c |   20 +++++++++++++++-----
 1 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/drivers/power/gta02_hdq.c b/drivers/power/gta02_hdq.c
index 6c228b4..99bd366 100644
--- a/drivers/power/gta02_hdq.c
+++ b/drivers/power/gta02_hdq.c
@@ -25,6 +25,13 @@
 #define HDQ_READ 0
 #define HDQ_WRITE 0x80
 
+static int fiq_busy(void)
+{
+       int request = (volatile u8)fiq_ipc.hdq_request_ctr;
+       int transact = (volatile u8)fiq_ipc.hdq_transaction_ctr;
+
+       return (request != transact);
+}
 
 int gta02hdq_initialized(void)
 {
@@ -39,8 +46,9 @@ int gta02hdq_read(int address)
 
        mutex_lock(&fiq_ipc.hdq_lock);
 
+       fiq_ipc.hdq_error = 0;
        fiq_ipc.hdq_ads = address | HDQ_READ;
-       fiq_ipc.hdq_request_ctr = fiq_ipc.hdq_transaction_ctr + 1;
+       fiq_ipc.hdq_request_ctr++;
        fiq_kick();
        /*
         * FIQ takes care of it while we block our calling process
@@ -50,7 +58,7 @@ int gta02hdq_read(int address)
        while (count_sleeps--) {
                msleep(10); /* valid transaction always completes in < 10ms */
 
-               if (fiq_ipc.hdq_request_ctr != fiq_ipc.hdq_transaction_ctr)
+               if (fiq_busy())
                        continue;
 
                if (fiq_ipc.hdq_error) {
@@ -63,7 +71,6 @@ int gta02hdq_read(int address)
                ret = fiq_ipc.hdq_rx_data;
                goto done;
        }
-       ret = -EINVAL;
 
 done:
        mutex_unlock(&fiq_ipc.hdq_lock);
@@ -78,6 +85,7 @@ int gta02hdq_write(int address, u8 data)
 
        mutex_lock(&fiq_ipc.hdq_lock);
 
+       fiq_ipc.hdq_error = 0;
        fiq_ipc.hdq_ads = address | HDQ_WRITE;
        fiq_ipc.hdq_tx_data = data;
        fiq_ipc.hdq_request_ctr++;
@@ -90,13 +98,15 @@ int gta02hdq_write(int address, u8 data)
        while (count_sleeps--) {
                msleep(10); /* valid transaction always completes in < 10ms */
 
-               if (fiq_ipc.hdq_request_ctr != fiq_ipc.hdq_transaction_ctr)
+               if (fiq_busy())
                        continue; /* something bad with FIQ */
 
                if (fiq_ipc.hdq_error)
                        goto done; /* didn't see a response in good time */
+
+               ret = 0;
+               goto done;
        }
-       ret = -EINVAL;
 
 done:
        mutex_unlock(&fiq_ipc.hdq_lock);


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