Rather than using conservative default timings for the NAND flash,
use the timings as specified in the S3C2442B MCP data sheet.
Signed-off-by: Harald Welte <[EMAIL PROTECTED]>
---
arch/arm/mach-s3c2440/mach-gta02.c | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c
b/arch/arm/mach-s3c2440/mach-gta02.c
index 1a9d823..b1aa95b 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -872,14 +872,14 @@ static struct s3c2410_nand_set gta02_nand_sets[] = {
},
};
-/* choose a set of timings which should suit most 512Mbit
- * chips and beyond.
+/* choose a set of timings derived from [EMAIL PROTECTED] MCP54
+ * data sheet (K5D2G13ACM-D075 MCP Memory)
*/
static struct s3c2410_platform_nand gta02_nand_info = {
- .tacls = 20,
- .twrph0 = 60,
- .twrph1 = 20,
+ .tacls = 0,
+ .twrph0 = 25,
+ .twrph1 = 15,
.nr_sets = ARRAY_SIZE(gta02_nand_sets),
.sets = gta02_nand_sets,
.software_ecc = 1,
--
1.5.6.5
