On Tuesday 21 October 2008 11:22:31 Harald Welte wrote:
> I'm really lost here, don't know what else to do. I'll get some profiles
> on a soft-ECC and on a non-irq-based-NAND kernel to compare the results and
> see if they also show this 'artefact'. Maybe 'top' is actually wrong? Any
> ideas?
@oprofile: You could catch Richard on irc, IIRC he did work on oprofile for
ARM and XScale and might know if some thing are not accounted because of
missing hooks.
@nand read:
- If we can not read faster, we can read fewer? The untested ideas are
attached. On S3C2442 there is a 2nd ECC hardware register bank, by setting
the ecc.size higher we might kill half of your read call's (if we can
actually read 512 byte at a time...) and the second ECC register is actually
doing something.
- Or just disable ECC this should make us read more data at once
(mtd->writesize)
maybe this sounds stupid or you already have tested these...
nice that you work on this
z.
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 4413d76..f2b2f32 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -465,11 +465,15 @@ static int s3c2412_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u
static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
{
struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
- unsigned long ecc = readl(info->regs + S3C2440_NFMECC0);
+ unsigned long ecc1 = readl(info->regs + S3C2440_NFMECC0);
+ unsigned long ecc2 = readl(info->regs + S3C2440_NFMECC1);
- ecc_code[0] = ecc;
- ecc_code[1] = ecc >> 8;
- ecc_code[2] = ecc >> 16;
+ ecc_code[0] = ecc1;
+ ecc_code[1] = ecc1 >> 8;
+ ecc_code[2] = ecc1 >> 16;
+ ecc_code[3] = ecc2;
+ ecc_code[4] = ecc2 >> 8;
+ ecc_code[5] = ecc2 >> 16;
pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff);
@@ -701,8 +705,8 @@ static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
* the large or small page nand device */
if (chip->page_shift > 10) {
- chip->ecc.size = 256;
- chip->ecc.bytes = 3;
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 6;
} else {
chip->ecc.size = 512;
chip->ecc.bytes = 3;
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 4413d76..0ea1830 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -655,7 +655,11 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
nmtd->mtd.priv = chip;
nmtd->mtd.owner = THIS_MODULE;
nmtd->set = set;
+ chip->ecc.mode = NAND_ECC_NONE;
+ return;
+
+#if 0
if (!info->platform->software_ecc && hardware_ecc) {
chip->ecc.calculate = s3c2410_nand_calculate_ecc;
chip->ecc.correct = s3c2410_nand_correct_data;
@@ -681,6 +685,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
} else {
chip->ecc.mode = NAND_ECC_SOFT;
}
+#endif
}
/* s3c2410_nand_update_chip
@@ -696,6 +701,7 @@ static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
printk("%s: chip %p: %d\n", __func__, chip, chip->page_shift);
+#if 0
if (hardware_ecc) {
/* change the behaviour depending on wether we are using
* the large or small page nand device */
@@ -709,6 +715,7 @@ static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
chip->ecc.layout = &nand_hw_eccoob;
}
}
+#endif
}
/* s3c2410_nand_probe
