Andy Green wrote: > If your further checking doesn't invalidate it, and if you don't track > the underlying thing in the meanwhile please post the gaps band-aid, and > we'll have that until something better comes.
I'll poke around some more, but here's the patch. No signed-off to make it clear that we don't want it to spread :) With it, I still get a little bit of grumbling about CRC issues when booting, but that's probably due to previous ECC "corrections". - Werner
bandaid-bogus-nand-ecc-read.patch For some yet unexplained reason, NAND_CMD_RNDOUT only works for 32-bit-aligned data on GTA02. The patch below makes sure that nand_read_subpage doesn't optimize the read and thus violate the above alignment requirement. This is a band-aid until the root cause is identified. Not meant for upstream. --- Index: ktrack/drivers/mtd/nand/nand_base.c =================================================================== --- ktrack.orig/drivers/mtd/nand/nand_base.c 2008-10-31 23:57:13.000000000 -0200 +++ ktrack/drivers/mtd/nand/nand_base.c 2008-10-31 23:57:22.000000000 -0200 @@ -810,7 +810,7 @@ int start_step, end_step, num_steps; uint32_t *eccpos = chip->ecc.layout->eccpos; uint8_t *p; - int data_col_addr, i, gaps = 0; + int data_col_addr, i, gaps = 1; int datafrag_len, eccfrag_len, aligned_len, aligned_pos; int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
