s3c2440-nand-handle-bytes.patch
With the introduction of optimized OOB reads in nand_read_subpage,
the length of the data requested may not be a multiple of four bytes.
This caused a partial read on the 2440, leading to false ECC errors
and, worse, attempts to "correct" them.
This patch adds reading/writing of trailing bytes to
s3c2440_nand_read_buf and (untested) s3c2410_nand_write_buf.
Signed-off-by: Werner Almesberger <[EMAIL PROTECTED]>
---
Index: ktrack/drivers/mtd/nand/s3c2410.c
===================================================================
--- ktrack.orig/drivers/mtd/nand/s3c2410.c 2008-11-03 14:06:00.000000000
-0200
+++ ktrack/drivers/mtd/nand/s3c2410.c 2008-11-03 14:06:20.000000000 -0200
@@ -530,7 +530,11 @@
static void s3c2440_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
{
struct nand_chip *chip = mtd->priv;
+ int i;
+
readsl(chip->IO_ADDR_R, buf, len >> 2);
+ for (i = len & ~3; unlikely(i != len); i++)
+ buf[i] = readb(chip->IO_ADDR_R);
}
static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf,
int len)
@@ -542,7 +546,11 @@
static void s3c2440_nand_write_buf(struct mtd_info *mtd, const u_char *buf,
int len)
{
struct nand_chip *chip = mtd->priv;
+ int i;
+
writesl(chip->IO_ADDR_W, buf, len >> 2);
+ for (i = len & ~3; unlikely(i != len); i++)
+ writeb(buf[i], chip->IO_ADDR_W);
}
/* cpufreq driver support */
