Prefer GTA03, enable dual mDDR init (killing SMDK compatability for now)
fix bugs in GPIO register offsets, set loglevel=8 for GTA03
Signed-off-by: Andy Green <[EMAIL PROTECTED]>
---
include/s3c6410.h | 15 ++++-----------
src/cpu/s3c6410/smdk6410-steppingstone.c | 2 +-
src/cpu/s3c6410/start.S | 2 +-
src/cpu/s3c6410/start_qi.c | 2 +-
4 files changed, 7 insertions(+), 14 deletions(-)
diff --git a/include/s3c6410.h b/include/s3c6410.h
index 7314fc2..baad9f5 100644
--- a/include/s3c6410.h
+++ b/include/s3c6410.h
@@ -33,7 +33,7 @@
#define CONFIG_S3C6410 1
#endif
-#define S3C64XX_UART_CHANNELS 3
+#define S3C64XX_UART_CHANNELS 4
#define S3C64XX_SPI_CHANNELS 2
#define HSMMC_CHANNEL 0
@@ -326,9 +326,9 @@ typedef enum {
#define GPACONSLP_OFFSET 0x0C
#define GPAPUDSLP_OFFSET 0x10
#define GPBCON_OFFSET 0x20
-#define GPBDAT_OFFSET 0x04
-#define GPBPUD_OFFSET 0x08
-#define GPBCONSLP_OFFSET 0x0C
+#define GPBDAT_OFFSET 0x24
+#define GPBPUD_OFFSET 0x28
+#define GPBCONSLP_OFFSET 0x2C
#define GPBPUDSLP_OFFSET 0x30
#define GPCCON_OFFSET 0x40
#define GPCDAT_OFFSET 0x44
@@ -1133,13 +1133,6 @@ typedef enum {
#define ELFIN_UART1_OFFSET 0x0400
#define ELFIN_UART2_OFFSET 0x0800
-#ifdef CONFIG_SERIAL1
-#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART0_OFFSET)
-#elif defined(CONFIG_SERIAL2)
-#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART1_OFFSET)
-#else
-#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART0_OFFSET)
-#endif
#define ULCON_OFFSET 0x00
#define UCON_OFFSET 0x04
diff --git a/src/cpu/s3c6410/smdk6410-steppingstone.c
b/src/cpu/s3c6410/smdk6410-steppingstone.c
index e7caab8..b8c3237 100644
--- a/src/cpu/s3c6410/smdk6410-steppingstone.c
+++ b/src/cpu/s3c6410/smdk6410-steppingstone.c
@@ -53,7 +53,7 @@ const struct board_api board_api_smdk6410 = {
.partition_index = 2,
.filepath = "boot/uImage.bin",
.commandline = "console=ttySAC0,115200 " \
- "loglevel=8 init=/bin/sh " \
+ "loglevel=3 init=/bin/sh " \
"root=/dev/mmcblk0p2 rootfstype=ext3"
},
[1] = {
diff --git a/src/cpu/s3c6410/start.S b/src/cpu/s3c6410/start.S
index ad2ef6c..a7da554 100644
--- a/src/cpu/s3c6410/start.S
+++ b/src/cpu/s3c6410/start.S
@@ -27,7 +27,7 @@
#define TEXT_BASE 0x53000000
-#define S3C6410_POP_A 0
+#define S3C6410_POP_A 1
#define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv)
diff --git a/src/cpu/s3c6410/start_qi.c b/src/cpu/s3c6410/start_qi.c
index b5b7cb9..622131c 100644
--- a/src/cpu/s3c6410/start_qi.c
+++ b/src/cpu/s3c6410/start_qi.c
@@ -34,8 +34,8 @@
extern void bootloader_second_phase(void);
const struct board_api *boards[] = {
- &board_api_smdk6410,
&board_api_gta03,
+ &board_api_smdk6410,
NULL /* always last */
};
