On Fri, Nov 28, 2008 at 09:38:29PM +0800, matt_hsu wrote: > Andy Green wrote: > > -----BEGIN PGP SIGNED MESSAGE----- > > Hash: SHA1 > > > > Somebody in the thread at some point said: > > > > | - if (offs > 15) > > | + if (offs < 15) > > | ~ reg = S3C64XX_EINT0CON0; > > | ~ else > > | ~ reg = S3C64XX_EINT0CON1; > > > > Matt should it be <= 15 then, or swap the CON0 / CON1? > > > Hmm, I'm so careless. Thanks for pointing this. > Either <=15 or swap the CON0/CON1 are the same logic. > Here is the revised patch.
< 16 would have done too. I've been trying to walk a Samsung engineer through submitting this as they found it earlier in the week, however it may be easier to apply these two from matt... I've also got a patch to configure the pin correctly to ensure they are in the correct mode for EINT. Does anyone want to support the extended GPIO int groups? > Matt > > - -Andy > > -----BEGIN PGP SIGNATURE----- > > Version: GnuPG v1.4.9 (GNU/Linux) > > Comment: Using GnuPG with Fedora - http://enigmail.mozdev.org > > > > iEYEARECAAYFAkkv7yQACgkQOjLpvpq7dMoQzgCfaPaq3Zl6PViRmJgg6D1p1h3z > > C7MAn205lL0YCb8pnPFve7E8EUSGP6Iq > > =MqCm > > -----END PGP SIGNATURE----- > > > > From: Matt Hsu <[EMAIL PROTECTED]> > Date: Fri, 28 Nov 2008 21:16:01 +0800 > > set the eint configuration correctly > > Signed-off-by: Matt Hsu <[EMAIL PROTECTED]> > --- > arch/arm/plat-s3c64xx/irq-eint.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/arch/arm/plat-s3c64xx/irq-eint.c > b/arch/arm/plat-s3c64xx/irq-eint.c > index 24c5e89..87a43a0 100644 > --- a/arch/arm/plat-s3c64xx/irq-eint.c > +++ b/arch/arm/plat-s3c64xx/irq-eint.c > @@ -82,7 +82,7 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned > int type) > if (offs > 27) > return -EINVAL; > > - if (offs > 15) > + if (offs <= 15) > reg = S3C64XX_EINT0CON0; > else > reg = S3C64XX_EINT0CON1; > -- > 1.5.5.1 > -- -- Ben Q: What's a light-year? A: One-third less calories than a regular year.
