>From [email protected] Thu Mar 5 11:34:03 2009 Message-Id: <[email protected]> References: <[email protected]> User-Agent: quilt/0.46-1 Date: Thu, 05 Mar 2009 11:33:27 +0800 From: Werner Almesberger <[email protected]> To: [email protected] Cc: Werner Almesberger <[email protected]> Subject: [PATCH 01/14] Fix s3c64xx_setrate_clksrc Content-Disposition: inline; filename=fix-s3c64xx_setrate_clksrc.patch
Note: this patch is already on the way upstream but is currently missing in the Openmoko kernel. Some of the rate selection logic in s3c64xx_setrate_clksrc uses what appears to be parent clock selection logic. This patch corrects it. I also added a check for overly large dividers to prevent them from changing unrelated clocks. Signed-off-by: Werner Almesberger <[email protected]> --- Index: cam/arch/arm/plat-s3c64xx/s3c6400-clock.c =================================================================== --- cam.orig/arch/arm/plat-s3c64xx/s3c6400-clock.c 2009-03-05 11:22:09.000000000 +0800 +++ cam/arch/arm/plat-s3c64xx/s3c6400-clock.c 2009-03-05 11:22:13.000000000 +0800 @@ -239,10 +239,12 @@ rate = clk_round_rate(clk, rate); div = clk_get_rate(clk->parent) / rate; + if (div > 16) + return -EINVAL; val = __raw_readl(reg); - val &= ~sclk->mask; - val |= (rate - 1) << sclk->shift; + val &= ~(0xf << sclk->shift); + val |= (div - 1) << sclk->shift; __raw_writel(val, reg); return 0; --
