s3c64xx_setrate_clksrc used the clock selection shift sclk->shift instead
of the divider shift sclk->divider_shift, causing clocks to be clobbered.

Signed-off-by: Werner Almesberger <wer...@openmoko.org>

---

Index: cam/arch/arm/plat-s3c64xx/s3c6400-clock.c
===================================================================
--- cam.orig/arch/arm/plat-s3c64xx/s3c6400-clock.c      2009-03-09 
20:10:23.000000000 +0800
+++ cam/arch/arm/plat-s3c64xx/s3c6400-clock.c   2009-03-09 20:10:56.000000000 
+0800
@@ -243,8 +243,8 @@
                return -EINVAL;
 
        val = __raw_readl(reg);
-       val &= ~(0xf << sclk->shift);
-       val |= (div - 1) << sclk->shift;
+       val &= ~(0xf << sclk->divider_shift);
+       val |= (div - 1) << sclk->divider_shift;
        __raw_writel(val, reg);
 
        return 0;

-- 

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