On Fri, Feb 24, 2012 at 3:37 PM, Drasko DRASKOVIC
<drasko.drasko...@gmail.com> wrote:
> Hi all,
> I am trying to load one TAP with instruction, and then shift in some
> data to that TAP. OpenOCD manual says :
>
> — Command: irscan [tap instruction]+ [-endstate tap_state]
> For each tap listed, loads the instruction register with its
> associated numeric instruction. (The number of bits in that
> instruction may be displayed using the scan_chain command.) For other
> TAPs, a BYPASS instruction is loaded.
>
> and
>
> — Command: drscan tap [numbits value]+ [-endstate tap_state]
> Loads the data register of tap with a series of bit fields that
> specify the entire register. Each field is numbits bits long with a
> numeric value (hexadecimal encouraged). The return value holds the
> original value of each of those fields.
>
>
> So, I was basically using irscan with TAP name and command (hex
> value), and then drscan - with tap name, num bits I want to shift to
> TAP and the vaule (in hex). However, this constanly hits the assert :
>
>   assert(active == tap);
>
> in driver.c. I discovered that irscan actually did not put all other
> TAPs to BYPASS mode leaving tap to which my target CPU is attached in
> the non-bypass mode, and thus preventing me to write to some other
> TAP.
>
> What would be the best way to avoid this ?

Hi,
actually, I have just discovered that although in fn
interface_jtag_add_ir_scan() all other TAPs were put to bypass state
allright, the polling which was happening in the background kept
switching back the target's TAP to active, right after irscan command
was executed on another TAP (thus putting this TAP as active, and
target's one to BYPASS, as it should be).

Switching polling off seems to be reasonable solution in this case.

BR,
Drasko

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