This is an automated email from Gerrit. Spencer Oliver ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/581
-- gerrit commit 7df91d3a81eef60fc78d2048860c026f7d40630a Author: Spencer Oliver <[email protected]> Date: Thu Apr 19 15:51:14 2012 +0100 stlink: support srst reset This adds the ability to support srst reset for the stlink/v2. stlink/v1 will fallback to using SYSRESETREQ which is a full reset - including peripherals. To enable the use of the srst add the following to your cfg: reset_config srst_only Change-Id: I570de607c5f370fd6a4abf47360686c9be07bcdd Signed-off-by: Spencer Oliver <[email protected]> diff --git a/src/target/stm32_stlink.c b/src/target/stm32_stlink.c index c9ab810..f9daa01 100644 --- a/src/target/stm32_stlink.c +++ b/src/target/stm32_stlink.c @@ -409,19 +409,36 @@ static int stm32_stlink_assert_reset(struct target *target) int res; struct stlink_interface_s *stlink_if = target_to_stlink(target); struct armv7m_common *armv7m = target_to_armv7m(target); + bool use_srst_fallback = true; LOG_DEBUG("%s", __func__); + enum reset_types jtag_reset_config = jtag_get_reset_config(); + + stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DHCSR, DBGKEY|C_DEBUGEN); + stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DEMCR, VC_CORERESET); + + if (jtag_reset_config & RESET_HAS_SRST) { + jtag_add_reset(0, 1); + res = stlink_if->layout->api->assert_srst(stlink_if->fd, 0); + if (res == ERROR_COMMAND_NOTFOUND) + LOG_ERROR("Hardware srst not supported, falling back to software reset"); + else if (res == ERROR_OK) { + /* hardware srst supported */ + use_srst_fallback = false; + } + } + + if (use_srst_fallback) { + /* stlink v1 api does support hardware srst, so we use a software reset fallback */ + stlink_if->layout->api->write_debug_reg(stlink_if->fd, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ); + } + res = stlink_if->layout->api->reset(stlink_if->fd); if (res != ERROR_OK) return res; - /* virtual assert reset, we need it for the internal - * jtag state machine - */ - jtag_add_reset(1, 1); - /* registers are now invalid */ register_cache_invalidate(armv7m->core_cache); @@ -438,9 +455,15 @@ static int stm32_stlink_assert_reset(struct target *target) static int stm32_stlink_deassert_reset(struct target *target) { int res; + struct stlink_interface_s *stlink_if = target_to_stlink(target); + + enum reset_types jtag_reset_config = jtag_get_reset_config(); LOG_DEBUG("%s", __func__); + if (jtag_reset_config & RESET_HAS_SRST) + stlink_if->layout->api->assert_srst(stlink_if->fd, 1); + /* virtual deassert reset, we need it for the internal * jtag state machine */ -- ------------------------------------------------------------------------------ For Developers, A Lot Can Happen In A Second. Boundary is the first to Know...and Tell You. Monitor Your Applications in Ultra-Fine Resolution. Try it FREE! http://p.sf.net/sfu/Boundary-d2dvs2 _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
