This is an automated email from Gerrit.

Spencer Oliver ([email protected]) just uploaded a new patch set to Gerrit, 
which you can find at http://openocd.zylin.com/604

-- gerrit

commit 744641d4de1d697c53ad4dd4dfcc0b5752d0d3ad
Author: Spencer Oliver <[email protected]>
Date:   Tue May 1 09:46:07 2012 +0100

    armv7m: update crc/erase_check loaders for cortex-m0
    
    Use loaders that have been built for cortex-m0, making them usable for both
    cortex-m0 and cortex-m3 families.
    
    Change-Id: Ifd82be87eaec2cb96464290c80800cec3630d619
    Signed-off-by: Spencer Oliver <[email protected]>

diff --git a/contrib/loaders/checksum/armv7m_crc.s 
b/contrib/loaders/checksum/armv7m_crc.s
index 4a1e8b4..8dfc40a 100644
--- a/contrib/loaders/checksum/armv7m_crc.s
+++ b/contrib/loaders/checksum/armv7m_crc.s
@@ -26,41 +26,46 @@
 
        .text
        .syntax unified
-       .arch armv7-m
+       .cpu cortex-m0
        .thumb
        .thumb_func
-       
+
        .align  2
 
 _start:
-main:  
+main:
        mov             r2, r0
-       mov             r0, #0xffffffff /* crc */
+       movs    r0, #0
+       mvns    r0, r0
+       ldr             r6, CRC32XOR
        mov             r3, r1
-       mov             r4, #0
+       movs    r4, #0
        b               ncomp
 nbyte:
        ldrb    r1, [r2, r4]
-
-       ldr             r7, CRC32XOR
-       eor             r0, r0, r1, asl #24
-       mov             r5, #0
+       lsls    r1, r1, #24
+       eors    r0, r0, r1
+       movs    r5, #0
 loop:
        cmp             r0, #0
-       mov             r6, r0, asl #1
-       add             r5, r5, #1
-       mov             r0, r6
-       it              lt
-       eorlt   r0, r6, r7
+       bge             notset
+       lsls    r0, r0, #1
+       eors    r0, r0, r6
+       b               cont
+notset:
+       lsls    r0, r0, #1
+cont:
+       adds    r5, r5, #1
        cmp             r5, #8
        bne             loop
-       
-       add             r4, r4, #1
+       adds    r4, r4, #1
 ncomp:
        cmp             r4, r3
        bne             nbyte
        bkpt    #0
 
+       .align  2
+
 CRC32XOR:      .word   0x04c11db7
 
        .end
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 780e81b..4c4c3c5 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -604,50 +604,48 @@ int armv7m_checksum_memory(struct target *target,
 
        /* see contib/loaders/checksum/armv7m_crc.s for src */
 
-       static const uint16_t cortex_m3_crc_code[] = {
-               0x4602,                                 /* mov  r2, r0 */
-               0xF04F, 0x30FF,                 /* mov  r0, #0xffffffff */
-               0x460B,                                 /* mov  r3, r1 */
-               0xF04F, 0x0400,                 /* mov  r4, #0 */
-               0xE013,                                 /* b    ncomp */
+       static const uint8_t cortex_m3_crc_code[] = {
+               /* main: */
+               0x02, 0x46,                     /* mov          r2, r0 */
+               0x00, 0x20,                     /* movs         r0, #0 */
+               0xC0, 0x43,                     /* mvns         r0, r0 */
+               0x0A, 0x4E,                     /* ldr          r6, CRC32XOR */
+               0x0B, 0x46,                     /* mov          r3, r1 */
+               0x00, 0x24,                     /* movs         r4, #0 */
+               0x0D, 0xE0,                     /* b            ncomp */
                /* nbyte: */
-               0x5D11,                                 /* ldrb r1, [r2, r4] */
-               0xF8DF, 0x7028,                 /* ldr          r7, CRC32XOR */
-               0xEA80, 0x6001,                 /* eor          r0, r0, r1, asl 
#24 */
-
-               0xF04F, 0x0500,                 /* mov          r5, #0 */
+               0x11, 0x5D,                     /* ldrb         r1, [r2, r4] */
+               0x09, 0x06,                     /* lsls         r1, r1, #24 */
+               0x48, 0x40,                     /* eors         r0, r0, r1 */
+               0x00, 0x25,                     /* movs         r5, #0 */
                /* loop: */
-               0x2800,                                 /* cmp          r0, #0 
*/
-               0xEA4F, 0x0640,                 /* mov          r6, r0, asl #1 
*/
-               0xF105, 0x0501,                 /* add          r5, r5, #1 */
-               0x4630,                                 /* mov          r0, r6 
*/
-               0xBFB8,                                 /* it           lt */
-               0xEA86, 0x0007,                 /* eor          r0, r6, r7 */
-               0x2D08,                                 /* cmp          r5, #8 
*/
-               0xD1F4,                                 /* bne          loop */
-
-               0xF104, 0x0401,                 /* add  r4, r4, #1 */
+               0x00, 0x28,                     /* cmp          r0, #0 */
+               0x02, 0xDA,                     /* bge          notset */
+               0x40, 0x00,                     /* lsls         r0, r0, #1 */
+               0x70, 0x40,                     /* eors         r0, r0, r6 */
+               0x00, 0xE0,                     /* b            cont */
+               /* notset: */
+               0x40, 0x00,                     /* lsls         r0, r0, #1 */
+               /* cont: */
+               0x01, 0x35,                     /* adds         r5, r5, #1 */
+               0x08, 0x2D,                     /* cmp          r5, #8 */
+               0xF6, 0xD1,                     /* bne          loop */
+               0x01, 0x34,                     /* adds         r4, r4, #1 */
                /* ncomp: */
-               0x429C,                                 /* cmp  r4, r3 */
-               0xD1E9,                                 /* bne  nbyte */
-               0xBE00,                         /* bkpt #0 */
-               0x1DB7, 0x04C1                  /* CRC32XOR:    .word 
0x04C11DB7 */
+               0x9C, 0x42,                     /* cmp          r4, r3 */
+               0xEF, 0xD1,                     /* bne          nbyte */
+               0x00, 0xBE,                     /* bkpt         #0 */
+               0xB7, 0x1D, 0xC1, 0x04  /* CRC32XOR:    .word   0x04c11db7 */
        };
 
-       uint32_t i;
-
        retval = target_alloc_working_area(target, sizeof(cortex_m3_crc_code), 
&crc_algorithm);
        if (retval != ERROR_OK)
                return retval;
 
-       /* convert flash writing code into a buffer in target endianness */
-       for (i = 0; i < ARRAY_SIZE(cortex_m3_crc_code); i++) {
-               retval = target_write_u16(target,
-                               crc_algorithm->address + i*sizeof(uint16_t),
-                               cortex_m3_crc_code[i]);
-               if (retval != ERROR_OK)
-                       goto cleanup;
-       }
+       retval = target_write_buffer(target, crc_algorithm->address,
+                       sizeof(cortex_m3_crc_code), (uint8_t 
*)cortex_m3_crc_code);
+       if (retval != ERROR_OK)
+               goto cleanup;
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
        armv7m_info.core_mode = ARMV7M_MODE_ANY;
@@ -686,15 +684,17 @@ int armv7m_blank_check_memory(struct target *target,
        struct reg_param reg_params[3];
        struct armv7m_algorithm armv7m_info;
        int retval;
-       uint32_t i;
 
-       static const uint16_t erase_check_code[] = {
+       /* see contib/loaders/erase_check/armv7m_erase_check.s for src */
+
+       static const uint8_t erase_check_code[] = {
                /* loop: */
-               0xF810, 0x3B01,         /* ldrb r3, [r0], #1 */
-               0xEA02, 0x0203,         /* and  r2, r2, r3 */
-               0x3901,                         /* subs r1, r1, #1 */
-               0xD1F9,                         /* bne  loop */
-               0xBE00,                 /* bkpt #0 */
+               0x03, 0x78,             /* ldrb r3, [r0] */
+               0x01, 0x30,             /* adds r0, #1 */
+               0x1A, 0x40,             /* ands r2, r2, r3 */
+               0x01, 0x39,             /* subs r1, r1, #1 */
+               0xFA, 0xD1,             /* bne  loop */
+               0x00, 0xBE              /* bkpt #0 */
        };
 
        /* make sure we have a working area */
@@ -702,11 +702,10 @@ int armv7m_blank_check_memory(struct target *target,
                &erase_check_algorithm) != ERROR_OK)
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 
-       /* convert flash writing code into a buffer in target endianness */
-       for (i = 0; i < ARRAY_SIZE(erase_check_code); i++)
-               target_write_u16(target,
-                       erase_check_algorithm->address + i*sizeof(uint16_t),
-                       erase_check_code[i]);
+       retval = target_write_buffer(target, erase_check_algorithm->address,
+                       sizeof(erase_check_code), (uint8_t *)erase_check_code);
+       if (retval != ERROR_OK)
+               return retval;
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
        armv7m_info.core_mode = ARMV7M_MODE_ANY;

-- 

------------------------------------------------------------------------------
Live Security Virtual Conference
Exclusive live event will cover all the ways today's security and 
threat landscape has changed and how IT managers can respond. Discussions 
will include endpoint security, mobile security and the latest in malware 
threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/
_______________________________________________
OpenOCD-devel mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/openocd-devel

Reply via email to