This is an automated email from Gerrit. Spencer Oliver ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/606
-- gerrit commit ad2462dd9a0676449db8b1758f3637bb4cf1dd06 Author: Spencer Oliver <[email protected]> Date: Tue May 1 13:18:42 2012 +0100 cortex-m3: support connecting under reset Some targets support connecting while the target's srst is asserted. Tested on stm32 family. Change-Id: I9df43623025e37832155aeee7aa099b844b85f16 Signed-off-by: Spencer Oliver <[email protected]> diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 09a51b7..f992bde 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -952,6 +952,16 @@ static int cortex_m3_assert_reset(struct target *target) return ERROR_OK; } + /* some cores support connecting while srst is asserted + * use that mode is it has been configured */ + + bool srst_asserted = false; + + if (jtag_reset_config & RESET_SRST_NO_GATING) { + adapter_assert_reset(); + srst_asserted = true; + } + /* Enable debug requests */ int retval; retval = mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr); @@ -996,7 +1006,8 @@ static int cortex_m3_assert_reset(struct target *target) if (jtag_reset_config & RESET_HAS_SRST) { /* default to asserting srst */ - adapter_assert_reset(); + if (!srst_asserted) + adapter_assert_reset(); } else { /* Use a standard Cortex-M3 software reset mechanism. * We default to using VECRESET as it is supported on all current cores. -- ------------------------------------------------------------------------------ Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
