On 26/11/12 7:15 AM, Akos Vandra wrote:
Hi guys!
I am trying to use openocd to program a jtag chain that is composed of:
- lpc1768 (cortex-m3)
- xc9572XL cpld (xilinx 9500 series)
- XC2C256 cpld (xilinx coolrunner II)
I am using the next config file:
debug_level 3
source [find interface/vsllink.cfg]
transport select jtag
adapter_khz 100
source [find target/lpc1768.cfg]
jtag newtap cpld1 tap -expected-id 0x49604093 -irlen 8
jtag newtap cpld2 tap -expected-id 0x16d4c093 -irlen 8
I generated the svf file using xilinx impact, adding the three devices
to the chain, specifying an irlen of 4 for the cpu, and 8 for the
coolrunner II cpld.
I took the irlen of the cpu from the lpc1768 config file, and the
irlen of the coolrunner from its bsdl file.
I clicked on output->svf->generate svf file, and then went on
"erasing" the device, and stopping the generation.
What I came up with is the attached svf file. I modified the
"FREQUENCY" command to be slow enough for the lpc1768 to handle (it
has 4MHz internal oscillator, so 666Khz max, I am using 10Khz instead
of the generated 1MHz)
I tried to play it with
svf <path_to_file.svf>
I also tried to play using
svf -tap cpld1.tap <path_to_file.svf>, but that gives a segfault.
<snip>
Has anyone done this before? I've no idea what I am doing wrong.
> I am not sure why openocd needs the -tap parameter. Aren't the svf
files describing transfers to the chain as a whole, and not a device in
a chain? And if they are directed at a device and not the chain, why do
I have to set up the chain (from my cpld programmer) before I can
generate the SVF files?
> Regards,
> Ákos Vandra
I'm not using the svf in production anymore, I use the onboard arm to do
the programming - I have it wired such that it can take the actel's jtag
lines away from the chain and run a programmer on it directly.
However when I used it, I'm pretty sure I generated my svf files as if
it was the only device on the chain, and then openocd just handles the
chaining. The actual svf files were generated with actel designer,
although the design is all done in Altium.
I'm not sure if it would be any help at all but I've attached one of my
archived svf files that handles the erase, which was run using the svf
player routine in my previous config file. The tap is set up to handle
any one of three alternate parts that can be loaded on the board.
<in config file>
# FPGA Tap:
jtag newtap fpga tap -irlen 8 -expected-id 0x1b9521cf -expected-id
0x129121cf -expected-id 0x1b9121cf
<snip>
# Loads a SVF file into the FPGA
#
proc a3p_svf_play {SVF_FILE} {
svf -tap fpga.tap $SVF_FILE quiet progress
}
<end config file>
and from the batch file I used to use to program using openocd:
openocd.exe -f a3p060_lpc3131_icdi.cfg -c "a3p_svf_play
../FPGA-A3P060/%FILE%" -c "exit"
If you're getting a segfault on using -tap something is seriously wrong,
openocd really shouldn't segfault on anything in normal operation, it
should throw a sanitised error if it's a config problem of any kind. I'm
not sure if enabling extra debug flags on openocd would give you more
information or not, I haven't been involved in debugging openocd on that
level before.
Best Regards,
Andrew Leech
!#ACTION ERASE;
!#PROCEDURE VERIFY_IDCODE
!# PROC_PRELOAD
!# PROC_ENABLE
!# DO_ERASE_ONLY
!# DO_EXIT;
!#CREATOR Designer Version: 8.6.0.34;
!#CAPTURE 8.6.0.34;
!#DEVICE A3P060;
!#PACKAGE A3P060-vq100;
!#DATE 2011/05/26;
!#STAPL_VERSION JESD71;
!#IDCODE 039121CF;
!#IDMASK 06FFFFFF;
!#DESIGN VideoInterface;
!#CHECKSUM C956;
!#SECURITY Disable;
!#ALG_VERSION 19;
!#MAP_VERSION 1;
!#TOOL_VERSION 1;
!#MAX_FREQ 10000000;
!#SILSIG 00000000;
!#TRACKING_SAR 76713;
!#SPEED_GRAD -1;
!#TEMP_GRAD COM;
FREQUENCY 4E6 HZ;
STATE RESET;
RUNTEST IDLE 5 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(0F);
SDR 32 TDI(00000000);
STATE IDLE;
RUNTEST IDLE 1 TCK;
SDR 32 TDI(00000000) TDO(039121CF) MASK(06FFFFFF);
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(DD);
SDR 128 TDI(00000000000000000000000000000000);
STATE IDLE;
RUNTEST IDLE 3 TCK;
STATE IDLE;
RUNTEST IDLE 165E-6 SEC;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(01);
SDR 372 TDI(92492492492492492492492492492492492492492492492492492492492492492492
4924924924924924924924924);
STATE IDLE;
RUNTEST IDLE 1 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(C0);
STATE IDLE;
RUNTEST IDLE 1 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(80);
SDR 18 TDI(00000);
STATE IDLE;
RUNTEST IDLE 3 TCK;
STATE IDLE;
RUNTEST IDLE 1875E-6 SEC;
SDR 18 TDI(00000) TDO(30000) MASK(30000);
! ACT_TE_TAG Erase ...
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(85);
SDR 23 TDI(004001);
STATE IDLE;
RUNTEST IDLE 3 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(84);
STATE IDLE;
RUNTEST IDLE 1 TCK;
STATE IDLE;
RUNTEST IDLE 52000000E-6 SEC;
SDR 5 TDI(00) TDO(00) MASK(0B);
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9F);
SDR 3 TDI(7);
STATE IDLE;
RUNTEST IDLE 1 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9B);
SDR 128 TDI(FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);
STATE IDLE;
RUNTEST IDLE 5 TCK;
STATE IDLE;
RUNTEST IDLE 10000E-6 SEC;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9F);
SDR 3 TDI(6);
STATE IDLE;
RUNTEST IDLE 1 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9B);
SDR 128 TDI(FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);
STATE IDLE;
RUNTEST IDLE 5 TCK;
STATE IDLE;
RUNTEST IDLE 10000E-6 SEC;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9F);
SDR 3 TDI(5);
STATE IDLE;
RUNTEST IDLE 1 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9B);
SDR 128 TDI(FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);
STATE IDLE;
RUNTEST IDLE 5 TCK;
STATE IDLE;
RUNTEST IDLE 10000E-6 SEC;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9F);
SDR 3 TDI(4);
STATE IDLE;
RUNTEST IDLE 1 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9B);
SDR 128 TDI(FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);
STATE IDLE;
RUNTEST IDLE 5 TCK;
STATE IDLE;
RUNTEST IDLE 10000E-6 SEC;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9F);
SDR 3 TDI(3);
STATE IDLE;
RUNTEST IDLE 1 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9B);
SDR 128 TDI(FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);
STATE IDLE;
RUNTEST IDLE 5 TCK;
STATE IDLE;
RUNTEST IDLE 10000E-6 SEC;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9F);
SDR 3 TDI(2);
STATE IDLE;
RUNTEST IDLE 1 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9B);
SDR 128 TDI(FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);
STATE IDLE;
RUNTEST IDLE 5 TCK;
STATE IDLE;
RUNTEST IDLE 10000E-6 SEC;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9F);
SDR 3 TDI(1);
STATE IDLE;
RUNTEST IDLE 1 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9B);
SDR 128 TDI(FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);
STATE IDLE;
RUNTEST IDLE 5 TCK;
STATE IDLE;
RUNTEST IDLE 10000E-6 SEC;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9F);
SDR 3 TDI(0);
STATE IDLE;
RUNTEST IDLE 1 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(9B);
SDR 128 TDI(FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);
STATE IDLE;
RUNTEST IDLE 5 TCK;
STATE IDLE;
RUNTEST IDLE 10000E-6 SEC;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(A7);
SDR 128 TDI(FFFF003FFFFFFFFFFFFFFFFF86FE008F);
STATE IDLE;
RUNTEST IDLE 15 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(84);
STATE IDLE;
RUNTEST IDLE 1 TCK;
STATE IDLE;
RUNTEST IDLE 8000E-6 SEC;
SDR 5 TDI(00) TDO(00) MASK(0B);
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(C0);
STATE IDLE;
RUNTEST IDLE 1 TCK;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(A8);
STATE IDLE;
RUNTEST IDLE 3 TCK;
STATE IDLE;
RUNTEST IDLE 165E-6 SEC;
SDR 128 TDI(00000000000000000000000000000000)
TDO(FFFF003FFFFFFFFFFFFFFFFF86FE008F)
MASK(FFFFFFFFFFFFFFFFFFFFFFFFFE01FFC0);
! ACT_TE_TAG Completed erase
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(81);
STATE IDLE;
RUNTEST IDLE 250E-6 SEC;
ENDIR IRPAUSE;
ENDDR DRPAUSE;
SIR 8 TDI(FF);
STATE IDLE;
RUNTEST IDLE 1 TCK;
STATE IDLE;
RUNTEST IDLE 250E-6 SEC;
------------------------------------------------------------------------------
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