I have a fresh build (if anyone is interested I can share that) 1. Without an adapter:
> d:\openocd-dev\openocd-swd\bin-x64>openocd -f target/stm32f1x-swd.cfg > Open On-Chip Debugger 0.7.0-dev-g2de3ce9-dirty (2012-11-28-09:33) > Licensed under GNU GPL v2 > For bug reports, read > http://openocd.sourceforge.net/doc/doxygen/bugs.html > Info : Transport - autoselecting 'swd' as the only option for 'ft2232_swd' > inter > face. > Info : Transport - interface 'ft2232_swd' defines its own > 'oocd_feature_arm_dap' > features. > Info : Transport - using 'oocd_feature_arm_dap' features of the 'ft2232_swd' > int > erface... > Info : Interface signal - 'RnW' added. > Info : Interface signal - 'LED' added. > Info : Interface signal - 'SRST' added. > Info : Interface signal - 'SRSTin' added. > Info : Interface signal - 'CLK' added. > Info : Interface signal - 'MOSI' added. > Info : Interface signal - 'MISO' added. > Info : Interface signal - 'nSWDsel' added. > adapter speed: 1000 kHz > adapter_nsrst_delay: 100 > cortex_m3 reset_config sysresetreq > Error: unable to open ftdi device: device not found > in procedure 'init' So good (; With connected interface (JTAG-lock-pick Tiny 2) and connected target (STM32 HD VL via SWD) I can do some basic operations, which are really slow, but seem to work > C:\Users\Freddie Chopin>telnet localhost 4444 > Trying 127.0.0.1... > Connected to localhost. > Escape character is '^]'. > Open On-Chip Debugger >> reset init > invalid command name "jtag" > > in procedure 'reset' >> halt > target was in unknown state when halt was requested > target state: halted > target halted due to debug-request, current mode: Handler SysTick > xPSR: 0x4100000f pc: 0x080007fc msp: 0x20001734 >> resume >> poll > background polling: on > TAP: stm32.cpu (enabled) > target state: running >> halt > target state: halted > target halted due to debug-request, current mode: Handler SysTick > xPSR: 0x4100000f pc: 0x080007fc msp: 0x20001734 >> resume >> poll > background polling: on > TAP: stm32.cpu (enabled) > target state: running >> halt > target state: halted > target halted due to debug-request, current mode: Handler External > Interrupt(27) > > xPSR: 0x4100002b pc: 0x080007fc msp: 0x20001734 >> reg > ===== arm v7m registers > (0) r0 (/32): 0x00000000 > (1) r1 (/32): 0x08004681 > (2) r2 (/32): 0x00000000 > (3) r3 (/32): 0x00000000 > (4) r4 (/32): 0x200005F8 > (5) r5 (/32): 0x20000718 > (6) r6 (/32): 0xEAB4DC4F > (7) r7 (/32): 0xEB51CD5E > (8) r8 (/32): 0xFFC72955 > (9) r9 (/32): 0x7FE4FAFE > (10) r10 (/32): 0xF5F77C65 > (11) r11 (/32): 0x75D35FFD > (12) r12 (/32): 0x20001370 > (13) sp (/32): 0x20001734 > (14) lr (/32): 0xFFFFFFF9 > (15) pc (/32): 0x080007FC > (16) xPSR (/32): 0x4100002B > (17) msp (/32): 0x20001734 > (18) psp (/32): 0xA94FFFF0 > (19) primask (/1): 0x00 > (20) basepri (/8): 0x00 > (21) faultmask (/1): 0x00 > (22) control (/2): 0x00 > ===== cortex-m3 dwt registers > (23) dwt_ctrl (/32) > (24) dwt_cyccnt (/32) > (25) dwt_0_comp (/32) > (26) dwt_0_mask (/4) > (27) dwt_0_function (/32) > (28) dwt_1_comp (/32) > (29) dwt_1_mask (/4) > (30) dwt_1_function (/32) > (31) dwt_2_comp (/32) > (32) dwt_2_mask (/4) > (33) dwt_2_function (/32) > (34) dwt_3_comp (/32) > (35) dwt_3_mask (/4) > (36) dwt_3_function (/32) >> mdw 0 > 0x00000000: 20001774 >> mdw 0 3 > 0x00000000: 20001774 08000135 080007fd >> arm disassemble > arm disassemble address [count ['thumb']] > stm32.cpu arm disassemble address [count ['thumb']] > in procedure 'arm' >> arm disassemble 0 10 > 0x00000000 0x1774 ASRS r4, r6, #0x1d > 0x00000002 0x2000 MOVS r0, #00 > 0x00000004 0x0135 LSLS r5, r6, #0x04 > 0x00000006 0x0800 LSRS r0, r0, #0x20 > 0x00000008 0x07fd LSLS r5, r7, #0x1f > 0x0000000a 0x0800 LSRS r0, r0, #0x20 > 0x0000000c 0x07fd LSLS r5, r7, #0x1f > 0x0000000e 0x0800 LSRS r0, r0, #0x20 > 0x00000010 0x07fd LSLS r5, r7, #0x1f > 0x00000012 0x0800 LSRS r0, r0, #0x20 >> arm disassemble 0x8000134 10 > 0x08000134 0xb508 PUSH {r3, r14} > 0x08000136 0xf000f827 BL 0x08000188 > 0x0800013a 0xf000f93b BL 0x080003b4 > 0x0800013e 0xf000f8a1 BL 0x08000284 > 0x08000142 0x4b0c LDR r3, [pc, #0x30] ; 0x08000174 > 0x08000144 0x490c LDR r1, [pc, #0x30] ; 0x08000178 > 0x08000146 0x2200 MOVS r2, #00 > 0x08000148 0xe001 B 0x0800014e > 0x0800014a 0xf8432b04 STR r2, [r3], #4 ; 0x04 > 0x0800014e 0x428b CMP r3, r1 >> So two things for now: 1. I cannot use h/w reset and "reset ..." command... 2. If I do "halt" the chip halts immediatelly, if I do "resume" nothing happens until I also issue a "poll" (or maybe some other commands too) - at this point the core is really resumed. Maybe point nr. 3: an option to silence libswd a bit would be nice too - currently it floods the console with endless lines of bit dumps, so I see no warnings/erros/important_things. I didn't manage to program the flash though... 4\/3!! ------------------------------------------------------------------------------ Keep yourself connected to Go Parallel: INSIGHTS What's next for parallel hardware, programming and related areas? Interviews and blogs by thought leaders keep you ahead of the curve. http://goparallel.sourceforge.net _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
