On Tue, Dec 4, 2012 at 11:49 PM, Freddie Chopin <[email protected]>wrote:
> W dniu 2012-12-04 23:27, Andreas Fritiofson pisze:
> > Is the gating required for this chip family? That makes it harder to
> > connect under reset to avoid the previous.
>
> It's the default option..
>
Then he should try setting srst_nogate.
> > Try with hard srst.
>
> If SRST is enabled (and it is), this setting makes no difference, as H/W
> always takes precedence.
>
You may be right, but then it sounds like a misfeature. Why shouldn't a
target specific behavior override the generic mechanism?
Anyway, if that's the case, he really needs to verify his reset wiring. Or
try with srst disabled...
/Andreas
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