Hi, I have a general question about openocd and jtag. I am using an LM3S1968 (on a TI eval kit board) as my target.
When my application code enables the on-chip PLL and increases the target clock speed to 50MHz I see that I need to _reduce_ the clock speed of the jtag interface - "adapter_khz 500" --> 100. Knowing nothing about how jtag works - this seem counter intuitive - I assumed that making the target go faster would allow jtag to go faster as well. Is there a simple explanation? -Ram ------------------------------------------------------------------------------ Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_jan _______________________________________________ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel
