This is an automated email from Gerrit. Hsiangkai Wang ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/1319
-- gerrit commit 6d76474eb06ec1abc7a208216f0d782109b1e908 Author: Hsiangkai <[email protected]> Date: Wed Mar 27 16:00:57 2013 +0800 nds32: do fpu/audio checking before to set fpu/audio registers Move fpu/audio checking from AICE module to NDS32 module. Let AICE module as simple as possible. Before to set fpu/audio registers, it needs to ensure fpu/audio is enabled. Otherwise, target will issue exceptions as accessing fpu/audio registers. Change-Id: I93d8a6d2dfaa528714e43b570b4972a5be6afafd Signed-off-by: Hsiangkai <[email protected]> diff --git a/src/jtag/aice/aice_usb.c b/src/jtag/aice/aice_usb.c index de57ac9..450dccd 100644 --- a/src/jtag/aice/aice_usb.c +++ b/src/jtag/aice/aice_usb.c @@ -1166,8 +1166,6 @@ static uint32_t edm_version; static struct cache_info icache = {0, 0, 0, 0, 0}; static struct cache_info dcache = {0, 0, 0, 0, 0}; static bool cache_init; -static bool fpu_enable; -static bool audio_enable; static int aice_read_reg(uint32_t num, uint32_t *val); static int aice_write_reg(uint32_t num, uint32_t val); @@ -1250,11 +1248,6 @@ static int aice_read_reg(uint32_t num, uint32_t *val) instructions[2] = DSB; instructions[3] = BEQ_MINUS_12; } else if (NDS32_REG_TYPE_AUMR == nds32_reg_type(num)) { /* audio registers */ - if (audio_enable == false) { - *val = 0; - return ERROR_OK; - } - if ((CB_CTL <= num) && (num <= CBE3)) { instructions[0] = AMFAR2(0, nds32_reg_sr_index(num)); instructions[1] = MTSR_DTR(0); @@ -1267,11 +1260,6 @@ static int aice_read_reg(uint32_t num, uint32_t *val) instructions[3] = BEQ_MINUS_12; } } else if (NDS32_REG_TYPE_FPU == nds32_reg_type(num)) { /* fpu registers */ - if (fpu_enable == false) { - *val = 0; - return ERROR_OK; - } - if (FPCSR == num) { instructions[0] = FMFCSR; instructions[1] = MTSR_DTR(0); @@ -1364,9 +1352,6 @@ static int aice_write_reg(uint32_t num, uint32_t val) instructions[2] = DSB; instructions[3] = BEQ_MINUS_12; } else if (NDS32_REG_TYPE_AUMR == nds32_reg_type(num)) { /* audio registers */ - if (audio_enable == false) - return ERROR_OK; - if ((CB_CTL <= num) && (num <= CBE3)) { instructions[0] = MFSR_DTR(0); instructions[1] = AMTAR2(0, nds32_reg_sr_index(num)); @@ -1379,9 +1364,6 @@ static int aice_write_reg(uint32_t num, uint32_t val) instructions[3] = BEQ_MINUS_12; } } else if (NDS32_REG_TYPE_FPU == nds32_reg_type(num)) { /* fpu registers */ - if (fpu_enable == false) - return ERROR_OK; - if (FPCSR == num) { instructions[0] = MFSR_DTR(0); instructions[1] = FMTCSR; @@ -1708,35 +1690,6 @@ static int aice_backup_tmp_registers(void) return ERROR_OK; } -/** - * If fpu/audio is disabled, to access fpu/audio registers will cause - * exceptions. So, we need to check if fpu/audio is enabled or not as - * target is halted. If fpu/audio is disabled, as users access fpu/audio - * registers, OpenOCD will return fake value 0 instead of accessing - * registers through DIM. - */ -static int aice_get_resource_setting(void) -{ - uint32_t value_fucpr; - - if (aice_read_reg(FUCPR, &value_fucpr) == ERROR_OK) { - if (value_fucpr & 0x1) - fpu_enable = true; - else - fpu_enable = false; - - if (value_fucpr & 0x80000000) - audio_enable = true; - else - audio_enable = false; - } else { - fpu_enable = false; - audio_enable = false; - } - - return ERROR_OK; -} - static int aice_restore_tmp_registers(void) { LOG_DEBUG("restore_tmp_registers - r0: 0x%08x, r1: 0x%08x", r0_backup, r1_backup); @@ -1902,7 +1855,6 @@ static int aice_usb_halt(void) /* backup r0 & r1 */ aice_backup_tmp_registers(); - aice_get_resource_setting(); core_state = AICE_TARGET_HALTED; return ERROR_OK; @@ -1940,7 +1892,6 @@ static int aice_usb_state(enum aice_target_state_s *state) /* init EDM for host debugging */ aice_init_edm_registers(true); aice_backup_tmp_registers(); - aice_get_resource_setting(); core_state = AICE_TARGET_HALTED; } else if (AICE_TARGET_UNKNOWN == core_state) { /* debug 'debug mode', use force debug to halt core */ @@ -2042,7 +1993,6 @@ static int aice_issue_reset_hold(void) if ((NDS_DBGER_CRST | NDS_DBGER_DEX) == (dbger_value & (NDS_DBGER_CRST | NDS_DBGER_DEX))) { aice_backup_tmp_registers(); - aice_get_resource_setting(); core_state = AICE_TARGET_HALTED; return ERROR_OK; @@ -2059,7 +2009,6 @@ static int aice_issue_reset_hold(void) if ((NDS_DBGER_CRST | NDS_DBGER_DEX) == (dbger_value & (NDS_DBGER_CRST | NDS_DBGER_DEX))) { aice_backup_tmp_registers(); - aice_get_resource_setting(); core_state = AICE_TARGET_HALTED; return ERROR_OK; diff --git a/src/target/nds32.c b/src/target/nds32.c index a90c806..81adcbb 100644 --- a/src/target/nds32.c +++ b/src/target/nds32.c @@ -75,6 +75,7 @@ static int nds32_get_core_reg(struct reg *reg) int retval; struct nds32_reg *reg_arch_info = reg->arch_info; struct target *target = reg_arch_info->target; + struct nds32 *nds32 = target_to_nds32(target); struct aice_port_s *aice = target_to_aice(target); if (target->state != TARGET_HALTED) { @@ -88,8 +89,18 @@ static int nds32_get_core_reg(struct reg *reg) if (reg_arch_info->enable == false) { reg_arch_info->value = NDS32_REGISTER_DISABLE; retval = ERROR_FAIL; - } else - retval = aice->port->api->read_reg(reg_arch_info->num, &(reg_arch_info->value)); + } else { + if ((nds32->fpu_enable == false) && + (NDS32_REG_TYPE_FPU == nds32_reg_type(reg_arch_info->num))) { + reg_arch_info->value = 0; + retval = ERROR_OK; + } else if ((nds32->audio_enable == false) && + (NDS32_REG_TYPE_AUMR == nds32_reg_type(reg_arch_info->num))) { + reg_arch_info->value = 0; + retval = ERROR_OK; + } else { + retval = aice->port->api->read_reg(reg_arch_info->num, &(reg_arch_info->value)); + } if (retval == ERROR_OK) { reg->valid = true; @@ -104,6 +115,7 @@ static int nds32_get_core_reg_64(struct reg *reg) int retval; struct nds32_reg *reg_arch_info = reg->arch_info; struct target *target = reg_arch_info->target; + struct nds32 *nds32 = target_to_nds32(target); struct aice_port_s *aice = target_to_aice(target); if (target->state != TARGET_HALTED) { @@ -117,8 +129,15 @@ static int nds32_get_core_reg_64(struct reg *reg) if (reg_arch_info->enable == false) { reg_arch_info->value_64 = NDS32_REGISTER_DISABLE; retval = ERROR_FAIL; - } else - retval = aice->port->api->read_reg_64(reg_arch_info->num, &(reg_arch_info->value_64)); + } else { + if ((nds32->fpu_enable == false) && + ((FD0 <= reg_arch_info->num) && (reg_arch_info->num <= FD31))) { + reg_arch_info->value_64 = 0; + retval = ERROR_OK; + } else { + retval = aice->port->api->read_reg_64(reg_arch_info->num, &(reg_arch_info->value_64)); + } + } if (retval == ERROR_OK) { reg->valid = true; @@ -188,12 +207,23 @@ static int nds32_set_core_reg(struct reg *reg, uint8_t *buf) if (nds32_reg_exception(reg_arch_info->num, value)) return ERROR_OK; - buf_set_u32(reg->value, 0, 32, value); - LOG_DEBUG("writing register %i(%s) with value 0x%8.8" PRIx32, reg_arch_info->num, reg->name, value); - aice->port->api->write_reg(reg_arch_info->num, reg_arch_info->value); + if ((nds32->fpu_enable == false) && + (NDS32_REG_TYPE_FPU == nds32_reg_type(reg_arch_info->num))) { + + buf_set_u32(reg->value, 0, 32, 0); + } else if ((nds32->audio_enable == false) && + (NDS32_REG_TYPE_AUMR == nds32_reg_type(reg_arch_info->num))) { + + buf_set_u32(reg->value, 0, 32, 0); + } else { + + buf_set_u32(reg->value, 0, 32, value); + aice->port->api->write_reg(reg_arch_info->num, reg_arch_info->value); + } + reg->valid = true; reg->dirty = false; @@ -221,6 +251,7 @@ static int nds32_set_core_reg_64(struct reg *reg, uint8_t *buf) { struct nds32_reg *reg_arch_info = reg->arch_info; struct target *target = reg_arch_info->target; + struct nds32 *nds32 = target_to_nds32(target); uint32_t low_part = buf_get_u32(buf, 0, 32); uint32_t high_part = buf_get_u32(buf, 32, 32); @@ -229,11 +260,21 @@ static int nds32_set_core_reg_64(struct reg *reg, uint8_t *buf) return ERROR_TARGET_NOT_HALTED; } - buf_set_u32(reg->value, 0, 32, low_part); - buf_set_u32(reg->value, 32, 32, high_part); + if ((nds32->fpu_enable == false) && + ((FD0 <= reg_arch_info->num) && (reg_arch_info->num <= FD31))) { - reg->valid = true; - reg->dirty = true; + buf_set_u32(reg->value, 0, 32, 0); + buf_set_u32(reg->value, 32, 32, 0); + + reg->valid = true; + reg->dirty = false; + } else { + buf_set_u32(reg->value, 0, 32, low_part); + buf_set_u32(reg->value, 32, 32, high_part); + + reg->valid = true; + reg->dirty = true; + } return ERROR_OK; } @@ -1623,6 +1664,13 @@ int nds32_edm_config(struct nds32 *nds32) return ERROR_OK; } +/** + * If fpu/audio is disabled, to access fpu/audio registers will cause + * exceptions. So, we need to check if fpu/audio is enabled or not as + * target is halted. If fpu/audio is disabled, as users access fpu/audio + * registers, OpenOCD will return fake value 0 instead of accessing + * registers through DIM. + */ int nds32_check_extension(struct nds32 *nds32) { uint32_t value; -- ------------------------------------------------------------------------------ Precog is a next-generation analytics platform capable of advanced analytics on semi-structured data. The platform includes APIs for building apps and a phenomenal toolset for data science. Developers can use our toolset for easy data analysis & visualization. Get a free account! http://www2.precog.com/precogplatform/slashdotnewsletter _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
