This is an automated email from Gerrit. Hsiangkai Wang ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/1330
-- gerrit commit 227072112e9aeefc226dac3f44c3fff762a107e0 Author: Hsiangkai <[email protected]> Date: Wed Mar 27 11:45:34 2013 +0800 nds32: add/modify log messages 1. Add/modify log messages to more easily debug. 2. Add/modify warning/error messages to identify the problem. 3. Check ILL_SEC_ACC condition Change-Id: I21a9c90fce9c0ebdef116534b48a68baa1cf9ae3 Signed-off-by: Hsiangkai <[email protected]> diff --git a/src/jtag/aice/aice_interface.c b/src/jtag/aice/aice_interface.c index b4f79e5..4559f0b 100644 --- a/src/jtag/aice/aice_interface.c +++ b/src/jtag/aice/aice_interface.c @@ -68,8 +68,12 @@ int aice_init_target(struct target *t) if (aice_num_of_target_id_codes == 0) { res = aice.port->api->idcode(aice_target_id_codes, &aice_num_of_target_id_codes); - if (res != ERROR_OK) + if (res != ERROR_OK) { + LOG_ERROR("<-- TARGET ERROR! Failed to identify AndesCore " + "JTAG Manufacture ID in the JTAG scan chain. " + "Failed to access EDM registers. -->"); return res; + } } t->tap->idcode = aice_target_id_codes[t->tap->abs_chain_position]; diff --git a/src/jtag/aice/aice_usb.c b/src/jtag/aice/aice_usb.c index cb496e4..dde6341 100644 --- a/src/jtag/aice/aice_usb.c +++ b/src/jtag/aice/aice_usb.c @@ -1275,7 +1275,7 @@ static int check_suppressed_exception(uint32_t dbger_value) uint32_t ir6_value; if ((dbger_value & NDS_DBGER_ALL_SUPRS_EX) == NDS_DBGER_ALL_SUPRS_EX) { - LOG_INFO("Exception is detected and suppressed"); + LOG_ERROR("<-- TARGET ERROR! Exception is detected and suppressed. -->"); aice_read_reg(IR4, &ir4_value); /* Clear IR6.SUPRS_EXC, IR6.IMP_EXC */ @@ -1300,6 +1300,19 @@ static int check_suppressed_exception(uint32_t dbger_value) return ERROR_OK; } +static int check_privilege(uint32_t dbger_value) +{ + if ((dbger_value & NDS_DBGER_ILL_SEC_ACC) == NDS_DBGER_ILL_SEC_ACC) { + LOG_ERROR("<-- TARGET ERROR! Insufficient security privilege to execute the debug operations. -->"); + + /* Clear DBGER.ILL_SEC_ACC */ + if (aice_write_misc(current_target_id, NDS_EDM_MISC_DBGER, NDS_DBGER_ILL_SEC_ACC) != ERROR_OK) + return ERROR_FAIL; + } + + return ERROR_OK; +} + static int aice_check_dbger(uint32_t expect_status) { uint32_t i = 0; @@ -1311,6 +1324,8 @@ static int aice_check_dbger(uint32_t expect_status) if ((value_dbger & expect_status) == expect_status) { if (ERROR_OK != check_suppressed_exception(value_dbger)) return ERROR_FAIL; + if (ERROR_OK != check_privilege(value_dbger)) + return ERROR_FAIL; return ERROR_OK; } @@ -1345,7 +1360,11 @@ static int aice_execute_dim(uint32_t *insts, uint8_t n_inst) /** read DBGER.DPED */ if (aice_check_dbger(NDS_DBGER_DPED) != ERROR_OK) { - LOG_ERROR("ERROR! DIM execution is not done"); + LOG_ERROR("<-- TARGET ERROR! Debug operations do not finish properly: 0x%08x 0x%08x 0x%08x 0x%08x. -->", + insts[0], + insts[1], + insts[2], + insts[3]); return ERROR_FAIL; } @@ -1417,8 +1436,10 @@ static int aice_read_reg(uint32_t num, uint32_t *val) aice_read_edmsr(current_target_id, NDS_EDM_SR_EDMSW, &value_edmsw); if (value_edmsw & NDS_EDMSW_WDV) aice_read_dtr(current_target_id, val); - else + else { + LOG_ERROR("<-- TARGET ERROR! The debug target failed to update the DTR register. -->"); return ERROR_FAIL; + } return ERROR_OK; } @@ -1459,8 +1480,10 @@ static int aice_write_reg(uint32_t num, uint32_t val) aice_write_dtr(current_target_id, val); aice_read_edmsr(current_target_id, NDS_EDM_SR_EDMSW, &value_edmsw); - if (0 == (value_edmsw & NDS_EDMSW_RDV)) + if (0 == (value_edmsw & NDS_EDMSW_RDV)) { + LOG_ERROR("<-- TARGET ERROR! AICE failed to write to the DTR register. -->"); return ERROR_FAIL; + } if (NDS32_REG_TYPE_GPR == nds32_reg_type(num)) { /* general registers */ instructions[0] = MFSR_DTR(num); @@ -2022,7 +2045,7 @@ static int aice_usb_halt(void) } if (aice_check_dbger(NDS_DBGER_DEX) != ERROR_OK) { - LOG_ERROR("ERROR! Cannot hold core through DBGI."); + LOG_ERROR("<-- TARGET ERROR! Unable to stop the debug target through DBGI. -->"); return ERROR_FAIL; } @@ -2061,18 +2084,18 @@ static int aice_usb_state(enum aice_target_state_s *state) if (ERROR_AICE_TIMEOUT == result) { if (aice_read_ctrl(AICE_READ_CTRL_GET_ICE_STATE, &ice_state) != ERROR_OK) { - LOG_INFO("USB is disconnected"); + LOG_ERROR("<-- AICE ERROR! AICE is unplugged. -->"); return ERROR_FAIL; } if ((ice_state & 0x20) == 0) { - LOG_INFO("Target is disconnected"); + LOG_ERROR("<-- TARGET ERROR! Target is disconnected with AICE. -->"); return ERROR_FAIL; } else { return ERROR_FAIL; } } else if (ERROR_AICE_DISCONNECT == result) { - LOG_INFO("USB is disconnected"); + LOG_ERROR("<-- AICE ERROR! AICE is unplugged. -->"); return ERROR_FAIL; } @@ -2091,8 +2114,13 @@ static int aice_usb_state(enum aice_target_state_s *state) } *state = AICE_TARGET_HALTED; } else if ((dbger_value & NDS_DBGER_CRST) == NDS_DBGER_CRST) { + LOG_DEBUG("DBGER.CRST is on."); + *state = AICE_TARGET_RESET; core_state = AICE_TARGET_RUNNING; + + /* Clear CRST */ + aice_write_misc(current_target_id, NDS_EDM_MISC_DBGER, NDS_DBGER_CRST); } else if ((dbger_value & NDS_DBGER_AT_MAX) == NDS_DBGER_AT_MAX) { uint32_t ir11_value; @@ -2105,10 +2133,19 @@ static int aice_usb_state(enum aice_target_state_s *state) /* Read OIPC to find out the trigger point */ aice_read_reg(IR11, &ir11_value); - LOG_INFO("Stall due to max_stop, trigger point: 0x%08x", ir11_value); + LOG_ERROR("<-- TARGET ERROR! Reaching the max interrupt stack level; " + "CPU is stalled at 0x%08x for debugging. -->", ir11_value); *state = AICE_TARGET_HALTED; core_state = AICE_TARGET_HALTED; + } else if ((dbger_value & NDS_DBGER_ILL_SEC_ACC) == NDS_DBGER_ILL_SEC_ACC) { + LOG_ERROR("<-- TARGET ERROR! Insufficient security privilege. -->"); + + /* Clear ILL_SEC_ACC */ + aice_write_misc(current_target_id, NDS_EDM_MISC_DBGER, NDS_DBGER_ILL_SEC_ACC); + + *state = AICE_TARGET_RUNNING; + core_state = AICE_TARGET_RUNNING; } else { *state = AICE_TARGET_RUNNING; core_state = AICE_TARGET_RUNNING; @@ -2156,6 +2193,7 @@ static int aice_issue_srst(void) return ERROR_FAIL; } + /* wait CRST infinitely */ uint32_t dbger_value; int i = 0; while (1) { @@ -2270,7 +2308,7 @@ static int aice_usb_run(void) return ERROR_FAIL; if ((dbger_value & NDS_DBGER_DEX) != NDS_DBGER_DEX) { - LOG_WARNING("WARNING! Target exited debug mode unexpectedly."); + LOG_WARNING("<-- TARGET WARNING! The debug target exited the debug mode unexpectedly. -->"); return ERROR_FAIL; } @@ -3148,7 +3186,12 @@ static int aice_usb_execute(uint32_t *instructions, uint32_t instruction_num) /** check DBGER.DPED */ if (aice_check_dbger(NDS_DBGER_DPED) != ERROR_OK) { - LOG_ERROR("ERROR! DIM execution is not done."); + + LOG_ERROR("<-- TARGET ERROR! Debug operations do not finish properly: 0x%08x 0x%08x 0x%08x 0x%08x. -->", + dim_instructions[0], + dim_instructions[1], + dim_instructions[2], + dim_instructions[3]); return ERROR_FAIL; } } diff --git a/src/target/nds32.c b/src/target/nds32.c index b5b55ee..7a4e8b6 100644 --- a/src/target/nds32.c +++ b/src/target/nds32.c @@ -86,8 +86,11 @@ static int nds32_get_core_reg(struct reg *reg) return ERROR_TARGET_NOT_HALTED; } - if (reg->valid) + if (reg->valid) { + LOG_DEBUG("reading register(cached) %i(%s), value: 0x%8.8" PRIx32, + reg_arch_info->num, reg->name, reg_arch_info->value); return ERROR_OK; + } if (reg_arch_info->enable == false) { reg_arch_info->value = NDS32_REGISTER_DISABLE; @@ -105,6 +108,10 @@ static int nds32_get_core_reg(struct reg *reg) retval = aice->port->api->read_reg(reg_arch_info->num, &(reg_arch_info->value)); } + LOG_DEBUG("reading register %i(%s), value: 0x%8.8" PRIx32, + reg_arch_info->num, reg->name, reg_arch_info->value); + } + if (retval == ERROR_OK) { reg->valid = true; reg->dirty = false; @@ -2135,6 +2142,7 @@ int nds32_halt(struct target *target) return ERROR_FAIL; if (TARGET_HALTED != state) + /* TODO: if state == TARGET_HALTED, check ETYPE is DBGI or not */ if (ERROR_OK != aice->port->api->halt()) return ERROR_FAIL; @@ -2163,7 +2171,7 @@ int nds32_poll(struct target *target) return ERROR_OK; } - LOG_DEBUG("enter TARGET_HALTED"); + LOG_DEBUG("Change target state to TARGET_HALTED."); target_call_event_callbacks(target, TARGET_EVENT_HALTED); } @@ -2176,12 +2184,11 @@ int nds32_poll(struct target *target) /* TODO: deassert srst */ } else if (target->state == TARGET_RUNNING) { /* reset as running */ - /* TODO: output messages */ - ; + LOG_WARNING("<-- TARGET WARNING! The debug target has been reset. -->"); } } else { if (target->state != TARGET_RUNNING && target->state != TARGET_DEBUG_RUNNING) { - LOG_DEBUG("enter TARGET_RUNNING"); + LOG_DEBUG("Change target state to TARGET_RUNNING."); target->state = TARGET_RUNNING; target->debug_reason = DBG_REASON_NOTHALTED; } diff --git a/src/target/nds32_cmd.c b/src/target/nds32_cmd.c index 4b8119f..7a99e71 100644 --- a/src/target/nds32_cmd.c +++ b/src/target/nds32_cmd.c @@ -392,9 +392,9 @@ COMMAND_HANDLER(handle_nds32_max_stop_command) aice->port->api->read_debug_reg(NDS_EDM_SR_EDM_CTL, &edm_ctl_value); if ((edm_ctl_value & (0x1 << 29)) != 0) - command_print(CMD_CTX, "global stop: on"); + command_print(CMD_CTX, "max stop: on"); else - command_print(CMD_CTX, "global stop: off"); + command_print(CMD_CTX, "max stop: off"); return ERROR_OK; } diff --git a/src/target/nds32_disassembler.c b/src/target/nds32_disassembler.c index 4402c82..da341e4 100644 --- a/src/target/nds32_disassembler.c +++ b/src/target/nds32_disassembler.c @@ -38,7 +38,7 @@ int nds32_read_opcode(struct nds32 *nds32, uint32_t address, uint32_t *value) return ERROR_FAIL; } - int retval = target_read_memory(target, address, 1, 4, value_buf); + int retval = target_read_buffer(target, address, 4, value_buf); if (retval == ERROR_OK) { /* instructions are always big-endian */ diff --git a/src/target/nds32_edm.h b/src/target/nds32_edm.h index 425e2a2..3349187 100644 --- a/src/target/nds32_edm.h +++ b/src/target/nds32_edm.h @@ -105,6 +105,7 @@ enum nds_memory_select { #define NDS_DBGER_DPED (0x2) #define NDS_DBGER_CRST (0x4) #define NDS_DBGER_AT_MAX (0x8) +#define NDS_DBGER_ILL_SEC_ACC (0x10) #define NDS_DBGER_ALL_SUPRS_EX (0x40000000) #define NDS_DBGER_RESACC (0x80000000) diff --git a/src/target/nds32_v2.c b/src/target/nds32_v2.c index 6c286f9..fc262e0 100644 --- a/src/target/nds32_v2.c +++ b/src/target/nds32_v2.c @@ -221,7 +221,7 @@ static int nds32_v2_check_interrupt_stack(struct nds32_v2_common *nds32_v2) nds32->current_interrupt_level = (val_ir0 >> 1) & 0x3; if (nds32_reach_max_interrupt_level(nds32)) { - LOG_INFO("Reaching the max interrupt stack level %d", nds32->current_interrupt_level); + LOG_ERROR("<-- TARGET ERROR! Reaching the max interrupt stack level %d. -->", nds32->current_interrupt_level); /* decrease interrupt level */ modified_psw = val_ir0 - 0x2; @@ -279,6 +279,9 @@ static int nds32_v2_debug_entry(struct nds32 *nds32, bool enable_watchpoint) jtag_poll_set_enabled(false); + if (nds32->virtual_hosting) + LOG_WARNING("<-- TARGET WARNING! Virtual hosting is not supported under V1/V2 architecture. -->"); + struct nds32_v2_common *nds32_v2 = target_to_nds32_v2(nds32->target); CHECK_RETVAL(nds32_v2_deactivate_hardware_breakpoint(nds32->target)); @@ -421,8 +424,13 @@ static int nds32_v2_add_breakpoint(struct target *target, if (breakpoint->type == BKPT_HARD) { /* check hardware resource */ - if (nds32_v2->n_hbr <= nds32_v2->next_hbr_index) + if (nds32_v2->n_hbr <= nds32_v2->next_hbr_index) { + LOG_WARNING("<-- TARGET WARNING! Insert too many hardware " + "breakpoints/watchpoints! The limit of " + "combined hardware breakpoints/watchpoints " + "is %d. -->", nds32_v2->n_hbr); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } /* update next place to put hardware breakpoint */ nds32_v2->next_hbr_index++; @@ -476,8 +484,12 @@ static int nds32_v2_add_watchpoint(struct target *target, struct nds32_v2_common *nds32_v2 = target_to_nds32_v2(target); /* check hardware resource */ - if (nds32_v2->n_hbr <= nds32_v2->next_hbr_index) + if (nds32_v2->n_hbr <= nds32_v2->next_hbr_index) { + LOG_WARNING("<-- TARGET WARNING! Insert too many hardware " + "breakpoints/watchpoints! The limit of " + "combined hardware breakpoints/watchpoints is %d. -->", nds32_v2->n_hbr); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } /* update next place to put hardware watchpoint */ nds32_v2->next_hbr_index++; @@ -622,6 +634,9 @@ static int nds32_v2_examine(struct target *target) target_set_examined(target); + /* TODO: remove this message */ + LOG_INFO("ICEman is ready to run."); + return ERROR_OK; } diff --git a/src/target/nds32_v3.c b/src/target/nds32_v3.c index 554ef7e..0516b62 100644 --- a/src/target/nds32_v3.c +++ b/src/target/nds32_v3.c @@ -233,7 +233,7 @@ static int nds32_v3_check_interrupt_stack(struct nds32_v3_common *nds32_v3) nds32->current_interrupt_level = (val_ir0 >> 1) & 0x3; if (nds32_reach_max_interrupt_level(nds32)) { - LOG_INFO("Reaching the max interrupt stack level %d", nds32->current_interrupt_level); + LOG_ERROR("<-- TARGET ERROR! Reaching the max interrupt stack level %d. -->", nds32->current_interrupt_level); return ERROR_FAIL; } @@ -542,8 +542,13 @@ static int nds32_v3_add_breakpoint(struct target *target, if (breakpoint->type == BKPT_HARD) { /* check hardware resource */ - if (nds32_v3->n_hbr <= nds32_v3->next_hbr_index) + if (nds32_v3->n_hbr <= nds32_v3->next_hbr_index) { + LOG_WARNING("<-- TARGET WARNING! Insert too many " + "hardware breakpoints/watchpoints! " + "The limit of combined hardware " + "breakpoints/watchpoints is %d. -->", nds32_v3->n_hbr); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } /* update next place to put hardware breakpoint */ nds32_v3->next_hbr_index++; @@ -599,8 +604,17 @@ static int nds32_v3_add_watchpoint(struct target *target, /* check hardware resource */ if (nds32_v3->n_hbr <= nds32_v3->next_hbr_index) { /* No hardware resource */ - if (nds32_v3->nds32.global_stop) + if (nds32_v3->nds32.global_stop) { + LOG_WARNING("<-- TARGET WARNING! The number of " + "watchpoints exceeds the hardware " + "resources. Stop at every load/store " + "instruction to check for watchpoint matches. -->"); return ERROR_OK; + } + + LOG_WARNING("<-- TARGET WARNING! Insert too many hardware " + "breakpoints/watchpoints! The limit of combined " + "hardware breakpoints/watchpoints is %d. -->", nds32_v3->n_hbr); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } @@ -850,6 +864,9 @@ static int nds32_v3_examine(struct target *target) target_set_examined(target); + /* TODO: remove this message */ + LOG_INFO("ICEman is ready to run."); + return ERROR_OK; } diff --git a/src/target/nds32_v3m.c b/src/target/nds32_v3m.c index d28f766..e0863ad 100644 --- a/src/target/nds32_v3m.c +++ b/src/target/nds32_v3m.c @@ -178,7 +178,7 @@ static int nds32_v3m_check_interrupt_stack(struct nds32_v3m_common *nds32_v3m) nds32->current_interrupt_level = (val_ir0 >> 1) & 0x3; if (nds32_reach_max_interrupt_level(nds32)) - LOG_INFO("Reaching the max interrupt stack level %d", nds32->current_interrupt_level); + LOG_ERROR("Reaching the max interrupt stack level %d", nds32->current_interrupt_level); /* backup $ir6 to avoid suppressed exception overwrite */ nds32_get_mapped_reg(nds32, IR6, &value); @@ -345,8 +345,13 @@ static int nds32_v3m_add_breakpoint(struct target *target, if (breakpoint->type == BKPT_HARD) { /* check hardware resource */ - if (nds32_v3m->next_hbr_index < nds32_v3m->next_hwp_index) + if (nds32_v3m->next_hbr_index < nds32_v3m->next_hwp_index) { + LOG_WARNING("<-- TARGET WARNING! Insert too many " + "hardware breakpoints/watchpoints! " + "The limit of combined hardware " + "breakpoints/watchpoints is %d. -->", nds32_v3m->n_hbr); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } /* update next place to put hardware breakpoint */ nds32_v3m->next_hbr_index--; @@ -400,11 +405,19 @@ static int nds32_v3m_add_watchpoint(struct target *target, struct nds32_v3m_common *nds32_v3m = target_to_nds32_v3m(target); /* check hardware resource */ - if (nds32_v3m->next_hwp_index >= nds32_v3m->n_hwp) + if (nds32_v3m->next_hwp_index >= nds32_v3m->n_hwp) { + LOG_WARNING("<-- TARGET WARNING! Insert too many hardware " + "watchpoints! The limit of hardware watchpoints " + "is %d. -->", nds32_v3m->n_hwp); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } - if (nds32_v3m->next_hwp_index > nds32_v3m->next_hbr_index) + if (nds32_v3m->next_hwp_index > nds32_v3m->next_hbr_index) { + LOG_WARNING("<-- TARGET WARNING! Insert too many hardware " + "breakpoints/watchpoints! The limit of combined " + "hardware breakpoints/watchpoints is %d. -->", nds32_v3m->n_hbr); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } /* update next place to put hardware watchpoint */ nds32_v3m->next_hwp_index++; @@ -585,6 +598,9 @@ static int nds32_v3m_examine(struct target *target) target_set_examined(target); + /* TODO: remove this message */ + LOG_INFO("ICEman is ready to run."); + return ERROR_OK; } -- ------------------------------------------------------------------------------ Precog is a next-generation analytics platform capable of advanced analytics on semi-structured data. The platform includes APIs for building apps and a phenomenal toolset for data science. Developers can use our toolset for easy data analysis & visualization. Get a free account! http://www2.precog.com/precogplatform/slashdotnewsletter _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
