This is an automated email from Gerrit. Ben Nahill ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/1336
-- gerrit commit 74017506fc5d6889b3205ecafa322f2f93a94c44 Author: Ben Nahill <[email protected]> Date: Wed Apr 17 16:46:07 2013 -0400 topic: STM32W support added to em357 driver The em357 driver only supported one page configuration (192k in 96 2048k) pages. This is fine for em357 chips since that's the size they have, but ST's STM32W chips (pretty much the same) have different flash configurations available (64, 128, 192, 256k). I can't find anywhere that would indicate the size of the chip anywhere in memory so the selection must be manual, using the 'size' parameter. For backwards compatibility, any size not known to be in use defaults to the 192k configuration. I don't have any em357 devices to test, but I also found that I had to re-assert the FPEC clock enable before performing an erase. This is a single line and shouldn't break any configurations. My testing so far has only been with a 64k device with 8k of RAM. Change-Id: Ic0ac400a9696efaa09d1407dd4a4d456bc2c318b Signed-off-by: Ben Nahill <[email protected]> diff --git a/src/flash/nor/em357.c b/src/flash/nor/em357.c index cbb71fc..664306c 100644 --- a/src/flash/nor/em357.c +++ b/src/flash/nor/em357.c @@ -358,6 +358,9 @@ static int em357_erase(struct flash_bank *bank, int first, int last) if ((first == 0) && (last == (bank->num_sectors - 1))) return em357_mass_erase(bank); + /* Enable FPEC clock */ + target_write_u32(target, EM357_FPEC_CLK, 0x00000001); + /* unlock flash registers */ int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1); if (retval != ERROR_OK) @@ -519,7 +522,6 @@ static int em357_write_block(struct flash_bank *bank, uint8_t *buffer, return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } } - ; armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; armv7m_info.core_mode = ARM_MODE_THREAD; @@ -609,6 +611,8 @@ static int em357_write(struct flash_bank *bank, uint8_t *buffer, if (retval != ERROR_OK) return retval; + target_write_u32(target, EM357_FPEC_CLK, 0x00000001); + /* multiple half words (2-byte) to be programmed? */ if (words_remaining > 0) { /* try using a block write */ @@ -680,14 +684,40 @@ static int em357_probe(struct flash_bank *bank) em357_info->probed = 0; + switch (bank->size) { + case 0x10000: + /* 64k -- 64 1k pages */ + num_pages = 64; + page_size = 1024; + break; + case 0x20000: + /* 128k -- 128 1k pages */ + num_pages = 128; + page_size = 1024; + break; + case 0x30000: + /* 192k -- 96 2k pages */ + num_pages = 96; + page_size = 2048; + break; + case 0x40000: + /* 256k -- 128 2k pages */ + num_pages = 128; + page_size = 2048; + break; + default: + LOG_WARNING("No size specified for em357 flash driver, assuming 192k!"); + num_pages = 96; + page_size = 2048; + break; + } + /* Enable FPEC CLK */ int retval = target_write_u32(target, EM357_FPEC_CLK, 0x00000001); if (retval != ERROR_OK) return retval; - page_size = 2048; em357_info->ppage_size = 4; - num_pages = 96; LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024); @@ -813,6 +843,9 @@ static int em357_mass_erase(struct flash_bank *bank) return ERROR_TARGET_NOT_HALTED; } + /* Make sure the flash clock is on */ + target_write_u32(target, EM357_FPEC_CLK, 0x00000001); + /* unlock option flash registers */ int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1); if (retval != ERROR_OK) -- ------------------------------------------------------------------------------ Precog is a next-generation analytics platform capable of advanced analytics on semi-structured data. The platform includes APIs for building apps and a phenomenal toolset for data science. Developers can use our toolset for easy data analysis & visualization. Get a free account! http://www2.precog.com/precogplatform/slashdotnewsletter _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
