This is an automated email from Gerrit. Oleksij Rempel ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/1338
-- gerrit commit 1d2917c767caeadf815826717762181cbfd6407b Author: Oleksij Rempel <[email protected]> Date: Mon Apr 15 09:40:21 2013 +0200 mips32: add jump instruction This instruction we will need to make jump to 0xff20.0000 Change-Id: Ic723e683e8848492cd8e186e71fd668dbd1d97e6 Signed-off-by: Oleksij Rempel <[email protected]> diff --git a/src/target/mips32.h b/src/target/mips32.h index 0bdfc59..c9c183c 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -130,6 +130,7 @@ struct mips32_algorithm { #define MIPS32_OP_AND 0x24 #define MIPS32_OP_CACHE 0x2F #define MIPS32_OP_COP0 0x10 +#define MIPS32_OP_J 0x02 #define MIPS32_OP_JR 0x08 #define MIPS32_OP_LUI 0x0F #define MIPS32_OP_LW 0x23 @@ -175,6 +176,7 @@ struct mips32_algorithm { #define MIPS32_BGTZ(reg, off) MIPS32_I_INST(MIPS32_OP_BGTZ, reg, 0, off) #define MIPS32_BNE(src, tar, off) MIPS32_I_INST(MIPS32_OP_BNE, src, tar, off) #define MIPS32_CACHE(op, off, base) MIPS32_I_INST(MIPS32_OP_CACHE, base, op, off) +#define MIPS32_J(tar) MIPS32_J_INST(MIPS32_OP_J, tar) #define MIPS32_JR(reg) MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_JR) #define MIPS32_MFC0(gpr, cpr, sel) MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MF, gpr, cpr, 0, sel) #define MIPS32_MTC0(gpr, cpr, sel) MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MT, gpr, cpr, 0, sel) -- ------------------------------------------------------------------------------ Precog is a next-generation analytics platform capable of advanced analytics on semi-structured data. The platform includes APIs for building apps and a phenomenal toolset for data science. Developers can use our toolset for easy data analysis & visualization. Get a free account! http://www2.precog.com/precogplatform/slashdotnewsletter _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
