This is an automated email from Gerrit.

Salvador Arroyo ([email protected]) just uploaded a new patch set to Gerrit, 
which you can find at http://openocd.zylin.com/1549

-- gerrit

commit 88c263c38431c7db4144cb783860eab871170e3c
Author: Salvador Arroyo <[email protected]>
Date:   Wed Aug 14 14:06:43 2013 +0200

    mips: bug in mips32_pracc_sync_cache()
    
    This function only does the job for the first cache line.
    
    Change-Id: I840b6347d986ea1ba8712effc2caedea0fd3be95
    Signed-off-by: Salvador Arroyo <[email protected]>

diff --git a/jimtcl b/jimtcl
index 2c1eba9..43d0866 160000
--- a/jimtcl
+++ b/jimtcl
@@ -1 +1 @@
-Subproject commit 2c1eba991e21a6f0b531fb0f83e21f9e6ee7c515
+Subproject commit 43d0866133a899532fb459a35860060add504923
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index d0ecba2..06703d6 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -623,16 +623,16 @@ static int mips32_pracc_sync_cache(struct mips_ejtag 
*ejtag_info,
 
                MIPS32_LUI(8, UPPER16(MIPS32_PRACC_PARAM_IN)),          /* $8 = 
MIPS32_PRACC_PARAM_IN */
                MIPS32_ORI(8, 8, LOWER16(MIPS32_PRACC_PARAM_IN)),
-               MIPS32_LW(9, 0, 8),                                             
                        /* Load write start_addr to $9 */
+               MIPS32_LW(9, 0, 8),                                             
                /* Load write start_addr to $9 */
                MIPS32_LW(10, 4, 8),                                            
                /* Load write end_addr to $10 */
 
                MIPS32_RDHWR(11, MIPS32_SYNCI_STEP),                            
/* $11 = MIPS32_SYNCI_STEP */
                MIPS32_BEQ(11, 0, 6),                                           
                /* beq $11, $0, end */
                MIPS32_NOP,
-                                                                               
                                        /* synci_loop : */
+                                                                               
                                /* synci_loop : */
                MIPS32_SYNCI(0, 9),                                             
                        /* synci 0($9) */
-               MIPS32_SLTU(8, 10, 9),                                          
                /* sltu $8, $10, $9  # $8 = $10 < $9 ? 1 : 0 */
-               MIPS32_BNE(8, 0, NEG16(3)),                                     
                /* bne $8, $0, synci_loop */
+               MIPS32_SLTU(8, 10, 9),                                          
        /* sltu $8, $10, $9  # $8 = $10 < $9 ? 1 : 0 */
+               MIPS32_BEQ(8, 0, NEG16(3)),                                     
                /* bne $8, $0, synci_loop */
                MIPS32_ADDU(9, 9, 11),                                          
                /* $9 += MIPS32_SYNCI_STEP */
                MIPS32_SYNC,
                                                                                
                                        /* end: */

-- 

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