Hi,
I'm working on the OpenRISC port. After some discussions with Andreas, and
after reading some old discussion [1], I have some doubt about the
endianess strategy I should adopt.
As I understand it, the JTAG interface sends datas LSB first to the target.
That means if the target wait for a 32 bits word (let's say 0x11223344) it
has to be added to the scan field in little endian order. Then, while
shifted out, bits will be send from the LSB to the MSB (first bit target
sees -> 0010 0010 1100 1100 0100 0100 1000 1000 <- last bit).
Am I understand it correctly ? Is that the normal behavior ?
Should I fix the opencores debug unit ?
Franck.
[1] https://forum.sparkfun.com/viewtopic.php?t=4201
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