This is an automated email from Gerrit. Andreas Fritiofson ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/1670
-- gerrit commit 7404b72aa3eaa3802d1c7c1096276b60d39962f0 Author: Andreas Fritiofson <[email protected]> Date: Sat Sep 28 18:22:51 2013 +0200 Revert what's left of f6a3fc81 That commit silenced a lot of compiler warnings and replaced them with runtime bugs. Not a good idea. This is unlikely to build on jenkins now, but that's because there *are* bugs here, it's just that they're now visible again. Change-Id: Id49c50ed20e94d5901df8bf775f0e6c29066d470 Signed-off-by: Andreas Fritiofson <[email protected]> diff --git a/src/flash/mflash.c b/src/flash/mflash.c index ea1673f..8f38e50 100644 --- a/src/flash/mflash.c +++ b/src/flash/mflash.c @@ -1173,7 +1173,7 @@ static int mg_storage_config(void) if (ret != ERROR_OK) return ret; - mg_gen_ataid((mg_io_type_drv_info *)(void *)buff); + mg_gen_ataid((mg_io_type_drv_info *)buff); ret = mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_stgdrvinfo); if (ret != ERROR_OK) @@ -1201,7 +1201,7 @@ static int mg_boot_config(void) buff[0] = mg_op_mode_snd; /* operation mode */ buff[1] = MG_UNLOCK_OTP_AREA; buff[2] = 4; /* boot size */ - *((uint32_t *)(void *)(buff + 4)) = 0; /* XIP size */ + *((uint32_t *)(buff + 4)) = 0; /* XIP size */ ret = mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_xipinfo); if (ret != ERROR_OK) diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c index ff02ffa..3947fab 100644 --- a/src/flash/nand/lpc3180.c +++ b/src/flash/nand/lpc3180.c @@ -1131,13 +1131,13 @@ static int lpc3180_read_page(struct nand_device *nand, 8, ecc_hw_buffer); for (i = 0; i < idx; i++) { - if ((0x00ffffff & *(uint32_t *)(void *)(ecc_hw_buffer+i*8)) != - (0x00ffffff & *(uint32_t *)(void *)(ecc_flash_buffer+8+i*16))) + if ((0x00ffffff & *(uint32_t *)(ecc_hw_buffer+i*8)) != + (0x00ffffff & *(uint32_t *)(ecc_flash_buffer+8+i*16))) LOG_WARNING( "ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32, i * 2 + 1, page); - if ((0x00ffffff & *(uint32_t *)(void *)(ecc_hw_buffer+4+i*8)) != - (0x00ffffff & *(uint32_t *)(void *)(ecc_flash_buffer+12+i*16))) + if ((0x00ffffff & *(uint32_t *)(ecc_hw_buffer+4+i*8)) != + (0x00ffffff & *(uint32_t *)(ecc_flash_buffer+12+i*16))) LOG_WARNING( "ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32, i * 2 + 2, page); diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c index 1bb549e..57aace3 100644 --- a/src/flash/nor/at91sam3.c +++ b/src/flash/nor/at91sam3.c @@ -2698,7 +2698,7 @@ static uint32_t *sam3_get_reg_ptr(struct sam3_cfg *pCfg, const struct sam3_reg_l /* By using prototypes - we can detect what would */ /* be casting errors. */ - return (uint32_t *)(void *)(((char *)(pCfg)) + pList->struct_offset); + return (uint32_t *)(((char *)(pCfg)) + pList->struct_offset); } @@ -2749,7 +2749,7 @@ static const struct sam3_reg_list *sam3_GetReg(struct sam3_chip *pChip, uint32_t /* calculate where this one go.. */ /* it is "possibly" this register. */ - pPossible = ((uint32_t *)(void *)(((char *)(&(pChip->cfg))) + pReg->struct_offset)); + pPossible = ((uint32_t *)(((char *)(&(pChip->cfg))) + pReg->struct_offset)); /* well? Is it this register */ if (pPossible == goes_here) { diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c index 1ba3910..352833a 100644 --- a/src/flash/nor/at91sam4.c +++ b/src/flash/nor/at91sam4.c @@ -1367,7 +1367,7 @@ static uint32_t *sam4_get_reg_ptr(struct sam4_cfg *pCfg, const struct sam4_reg_l /* By using prototypes - we can detect what would */ /* be casting errors. */ - return (uint32_t *)(void *)(((char *)(pCfg)) + pList->struct_offset); + return (uint32_t *)(((char *)(pCfg)) + pList->struct_offset); } @@ -1416,7 +1416,7 @@ static const struct sam4_reg_list *sam4_GetReg(struct sam4_chip *pChip, uint32_t /* calculate where this one go.. */ /* it is "possibly" this register. */ - pPossible = ((uint32_t *)(void *)(((char *)(&(pChip->cfg))) + pReg->struct_offset)); + pPossible = ((uint32_t *)(((char *)(&(pChip->cfg))) + pReg->struct_offset)); /* well? Is it this register */ if (pPossible == goes_here) { diff --git a/src/helper/types.h b/src/helper/types.h index 3d27e83..a5dc9d4 100644 --- a/src/helper/types.h +++ b/src/helper/types.h @@ -80,7 +80,7 @@ typedef bool _Bool; */ #define container_of(ptr, type, member) ({ \ const typeof( ((type *)0)->member ) *__mptr = (ptr); \ - (type *)( (void *) ( (char *)__mptr - offsetof(type,member) ) );}) + (type *)((char *)__mptr - offsetof(type, member)); }) /** diff --git a/src/target/arm11.c b/src/target/arm11.c index 61f1f64..b2ed239 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -843,7 +843,7 @@ static int arm11_read_memory_inner(struct target *target, { uint32_t instr = !arm11_config_memrw_no_increment ? 0xecb05e01 : 0xed905e00; /** \todo TODO: buffer cast to uint32_t* causes alignment warnings */ - uint32_t *words = (uint32_t *)(void *)buffer; + uint32_t *words = (uint32_t *)buffer; /* LDC p14,c5,[R0],#4 */ /* LDC p14,c5,[R0] */ @@ -964,7 +964,7 @@ static int arm11_write_memory_inner(struct target *target, uint32_t instr = !no_increment ? 0xeca05e01 : 0xed805e00; /** \todo TODO: buffer cast to uint32_t* causes alignment warnings */ - uint32_t *words = (uint32_t *)(void *)buffer; + uint32_t *words = (uint32_t *)buffer; /* "burst" here just means trusting each instruction executes * fully before we run the next one: per-word roundtrips, to diff --git a/src/target/avr32_ap7k.c b/src/target/avr32_ap7k.c index 12bea66..4fbb9bd 100644 --- a/src/target/avr32_ap7k.c +++ b/src/target/avr32_ap7k.c @@ -458,11 +458,11 @@ static int avr32_ap7k_read_memory(struct target *target, uint32_t address, switch (size) { case 4: return avr32_jtag_read_memory32(&ap7k->jtag, address, count, - (uint32_t *)(void *)buffer); + (uint32_t *)buffer); break; case 2: return avr32_jtag_read_memory16(&ap7k->jtag, address, count, - (uint16_t *)(void *)buffer); + (uint16_t *)buffer); break; case 1: return avr32_jtag_read_memory8(&ap7k->jtag, address, count, buffer); @@ -499,11 +499,11 @@ static int avr32_ap7k_write_memory(struct target *target, uint32_t address, switch (size) { case 4: return avr32_jtag_write_memory32(&ap7k->jtag, address, count, - (uint32_t *)(void *)buffer); + (uint32_t *)buffer); break; case 2: return avr32_jtag_write_memory16(&ap7k->jtag, address, count, - (uint16_t *)(void *)buffer); + (uint16_t *)buffer); break; case 1: return avr32_jtag_write_memory8(&ap7k->jtag, address, count, buffer); diff --git a/src/target/avr32_mem.c b/src/target/avr32_mem.c index a7797a2..bf5da04 100644 --- a/src/target/avr32_mem.c +++ b/src/target/avr32_mem.c @@ -108,7 +108,7 @@ int avr32_jtag_read_memory8(struct avr32_jtag *jtag_info, /* Do we have non-aligned bytes? */ if (addr & 3) { retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED, - addr + i, (uint32_t *)(void *)data); + addr + i, (uint32_t *)data); if (retval != ERROR_OK) return retval; @@ -120,7 +120,7 @@ int avr32_jtag_read_memory8(struct avr32_jtag *jtag_info, /* read all complete words */ for (; i < (count & ~3); i += 4) { retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED, - addr + i, (uint32_t *)(void *)data); + addr + i, (uint32_t *)data); if (retval != ERROR_OK) return retval; @@ -132,7 +132,7 @@ int avr32_jtag_read_memory8(struct avr32_jtag *jtag_info, /* remaining bytes */ if (i < count) { retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED, - addr + i, (uint32_t *)(void *)data); + addr + i, (uint32_t *)data); if (retval != ERROR_OK) return retval; diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c index 97348e4..afaa1ca 100644 --- a/src/target/dsp563xx.c +++ b/src/target/dsp563xx.c @@ -1568,7 +1568,7 @@ static int dsp563xx_read_memory_core(struct target *target, if (err != ERROR_OK) return err; err = dsp563xx_once_reg_read(target->tap, 0, - DSP563XX_ONCE_OGDBR, (uint32_t *)(void *)b); + DSP563XX_ONCE_OGDBR, (uint32_t *)b); if (err != ERROR_OK) return err; b += 4; -- ------------------------------------------------------------------------------ October Webinars: Code for Performance Free Intel webinars can help you accelerate application performance. Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from the latest Intel processors and coprocessors. See abstracts and register > http://pubads.g.doubleclick.net/gampad/clk?id=60133471&iu=/4140/ostg.clktrk _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
