This is an automated email from Gerrit.
Andreas Fritiofson (andreas.fritiof...@gmail.com) just uploaded a new patch set
to Gerrit, which you can find at http://openocd.zylin.com/1689
-- gerrit
commit f895194472ada463b5987521aef093027ea71cd6
Author: Andreas Fritiofson <andreas.fritiof...@gmail.com>
Date: Mon Oct 7 20:56:16 2013 +0200
stm32f2x: Fix sector numbering for dual bank flash erase
Reference: RM0090 rev 5.
Change-Id: I9f7ae09c0ba91d166aebcdc25300d0ca58a5a56d
Signed-off-by: Andreas Fritiofson <andreas.fritiof...@gmail.com>
Reported-by: Nader Shehayed <nsheha...@gmail.com>
diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c
index de11b37..a7aba2b 100644
--- a/src/flash/nor/stm32f2x.c
+++ b/src/flash/nor/stm32f2x.c
@@ -111,7 +111,9 @@
#define FLASH_PSIZE_16 (1 << 8)
#define FLASH_PSIZE_32 (2 << 8)
#define FLASH_PSIZE_64 (3 << 8)
-#define FLASH_SNB(a) ((a) << 3)
+/* The sector number encoding is not straight binary for dual bank flash.
+ * Warning: evaluates the argument multiple times */
+#define FLASH_SNB(a) ((((a) >= 12) ? 0x10 | ((a) - 12) : (a)) << 3)
#define FLASH_LOCK (1 << 31)
/* FLASH_SR register bits */
@@ -403,6 +405,9 @@ static int stm32x_erase(struct flash_bank *bank, int first,
int last)
struct target *target = bank->target;
int i;
+ assert(first < bank->num_sectors);
+ assert(last < bank->num_sectors);
+
if (bank->target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
@@ -418,7 +423,7 @@ static int stm32x_erase(struct flash_bank *bank, int first,
int last)
To erase a sector, follow the procedure below:
1. Check that no Flash memory operation is ongoing by checking the BSY
bit in the
FLASH_SR register
- 2. Set the SER bit and select the sector (out of the 12 sectors in the
main memory block)
+ 2. Set the SER bit and select the sector
you wish to erase (SNB) in the FLASH_CR register
3. Set the STRT bit in the FLASH_CR register
4. Wait for the BSY bit to be cleared
--
------------------------------------------------------------------------------
October Webinars: Code for Performance
Free Intel webinars can help you accelerate application performance.
Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from
the latest Intel processors and coprocessors. See abstracts and register >
http://pubads.g.doubleclick.net/gampad/clk?id=60134071&iu=/4140/ostg.clktrk
_______________________________________________
OpenOCD-devel mailing list
OpenOCD-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/openocd-devel
