This is an automated email from Gerrit. Kamal Dasu ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/1781
-- gerrit commit 51fac76c061c1164fa09772907425fb4388084df Author: Kamal Dasu <[email protected]> Date: Thu Oct 24 14:58:55 2013 -0400 cortex_a: Fix host endianess issues with cortex_a8_read/write_memory calls Make the memory read write routines handle endianess when running on big endian host. Use existing target apis to take care of endianess of the passed read/write buffer. Change-Id: Ia927c60c4837617f5342a9beb6fdab1f061855fe Signed-off-by: Kamal Dasu <[email protected]> diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 4649f6c..7849572 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -2152,6 +2152,18 @@ static int cortex_a8_read_memory(struct target *target, uint32_t address, struct adiv5_dap *swjdp = armv7a->arm.dap; uint8_t apsel = swjdp->apsel; + void *t = NULL; + + /* for handling endianess */ + if (size > 1) { + t = malloc(count * size * sizeof(uint8_t)); + if (t == NULL) { + LOG_ERROR("Out of memory"); + return ERROR_FAIL; + } + } else + t = buffer; + /* cortex_a8 handles unaligned memory access */ LOG_DEBUG("Reading memory at address 0x%x; size %d; count %d", address, size, count); @@ -2159,33 +2171,49 @@ static int cortex_a8_read_memory(struct target *target, uint32_t address, if (!armv7a->is_armv7r) { retval = cortex_a8_mmu(target, &enabled); if (retval != ERROR_OK) - return retval; - + goto done; if (enabled) { virt = address; retval = cortex_a8_virt2phys(target, virt, &phys); if (retval != ERROR_OK) - return retval; + goto done; LOG_DEBUG("Reading at virtual address. Translating v:0x%x to r:0x%x", virt, phys); address = phys; } } - retval = cortex_a8_read_phys_memory(target, address, size, count, buffer); + retval = cortex_a8_read_phys_memory(target, address, size, count, t); } else { if (!armv7a->is_armv7r) { retval = cortex_a8_check_address(target, address); if (retval != ERROR_OK) - return retval; + goto done; /* enable mmu */ retval = cortex_a8_mmu_modify(target, 1); if (retval != ERROR_OK) - return retval; + goto done; } - retval = cortex_a8_read_apb_ab_memory(target, address, size, count, buffer); + retval = cortex_a8_read_apb_ab_memory(target, address, size, count, t); } + + if (ERROR_OK == retval) { + switch (size) { + case 4: + target_buffer_set_u32_array(target, buffer, count, t); + break; + case 2: + target_buffer_set_u16_array(target, buffer, count, t); + break; + } + } + +done: + if ((size > 1) && (t != NULL)) + free(t); + + return retval; } @@ -2301,6 +2329,28 @@ static int cortex_a8_write_memory(struct target *target, uint32_t address, struct armv7a_common *armv7a = target_to_armv7a(target); struct adiv5_dap *swjdp = armv7a->arm.dap; uint8_t apsel = swjdp->apsel; + + void *t = NULL; + + /* adjust for host endianess in write buffer data */ + if (size > 1) { + t = malloc(count * size * sizeof(uint8_t)); + if (t == NULL) { + LOG_ERROR("Out of memory"); + return ERROR_FAIL; + } + + switch (size) { + case 4: + target_buffer_get_u32_array(target, buffer, count, (uint32_t *)t); + break; + case 2: + target_buffer_get_u16_array(target, buffer, count, (uint16_t *)t); + break; + } + } else + t = (void *) buffer; + /* cortex_a8 handles unaligned memory access */ LOG_DEBUG("Writing memory at address 0x%x; size %d; count %d", address, size, count); @@ -2311,13 +2361,13 @@ static int cortex_a8_write_memory(struct target *target, uint32_t address, if (!armv7a->is_armv7r) { retval = cortex_a8_mmu(target, &enabled); if (retval != ERROR_OK) - return retval; + goto freetbuf; if (enabled) { virt = address; retval = cortex_a8_virt2phys(target, virt, &phys); if (retval != ERROR_OK) - return retval; + goto freetbuf; LOG_DEBUG("Writing to virtual address. Translating v:0x%x to r:0x%x", virt, phys); @@ -2326,19 +2376,24 @@ static int cortex_a8_write_memory(struct target *target, uint32_t address, } retval = cortex_a8_write_phys_memory(target, address, size, - count, buffer); + count, t); } else { if (!armv7a->is_armv7r) { retval = cortex_a8_check_address(target, address); if (retval != ERROR_OK) - return retval; + goto freetbuf; /* enable mmu */ retval = cortex_a8_mmu_modify(target, 1); if (retval != ERROR_OK) - return retval; + goto freetbuf; } - retval = cortex_a8_write_apb_ab_memory(target, address, size, count, buffer); + retval = cortex_a8_write_apb_ab_memory(target, address, size, count, t); } + +freetbuf: + if (size > 1 && t != NULL) + free(t); + return retval; } -- ------------------------------------------------------------------------------ October Webinars: Code for Performance Free Intel webinars can help you accelerate application performance. Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from the latest Intel processors and coprocessors. See abstracts and register > http://pubads.g.doubleclick.net/gampad/clk?id=60135991&iu=/4140/ostg.clktrk _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
