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Nemui Trinomius ([email protected]) just uploaded a new patch set 
to Gerrit, which you can find at http://openocd.zylin.com/1793

-- gerrit

commit f94a05cb310db478c303139edcb1e3669ead1e81
Author: Nemui Trinomius <[email protected]>
Date:   Mon Nov 4 15:43:43 2013 +0900

    fm3: fix Fujitsu MB9Ax family support
    
    Some MB9Ax (especially few internal SRAM model) fails programming
    because of wrong SRAM basic-address on running algorithm.
    Default SRAM basic-address must be 0x20000000.
    This patch is fixing default SRAM basic-address and ramcode offset.
    Tested on a MB9BF618T and MB9AF112K.
    
    Change-Id: Ibda9aceb4c317bcae0dcce9f6d0fd1c4b5d81952
    Signed-off-by: Nemui Trinomius <[email protected]>

diff --git a/src/flash/nor/fm3.c b/src/flash/nor/fm3.c
index 70114da..45673e0 100644
--- a/src/flash/nor/fm3.c
+++ b/src/flash/nor/fm3.c
@@ -450,10 +450,11 @@ static int fm3_write_block(struct flash_bank *bank, 
uint8_t *buffer,
        0x00, 0xBE,                                     /*        BKPT     #0   
                      */
 
        /* The following address pointers assume, that the code is running from 
  */
-       /* SRAM basic-address(BASE_ADDR)+8.These address pointers will be 
patched */
-       /* if a different start address in RAM is used (e.g. for Flash type 2)! 
  */
-       0x00, 0x80, 0xFF, 0x1F,     /* u32DummyRead address in RAM (BASE_ADDR)  
  */
-       0x04, 0x80, 0xFF, 0x1F      /* u32FlashResult address in RAM 
(BASE_ADDR+4)*/
+       /* SRAM basic-address + 8.These address pointers will be patched, if a  
  */
+       /* different start address in RAM is used (e.g. for Flash type 2)!      
  */
+       /* Default SRAM basic-address is 0x20000000.                            
  */
+       0x00, 0x00, 0x00, 0x20,     /* u32DummyRead address in RAM (0x20000000) 
  */
+       0x04, 0x00, 0x00, 0x20      /* u32FlashResult address in RAM 
(0x20000004) */
        };
 
        LOG_INFO("Fujitsu MB9[A/B]FXXX: FLASH Write ...");
@@ -479,18 +480,32 @@ static int fm3_write_block(struct flash_bank *bank, 
uint8_t *buffer,
                return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
        }
 
-       /* allocate working area with flash programming code */
-       if (target_alloc_working_area(target, sizeof(fm3_flash_write_code),
+       /* allocate working area and valiables with flash programming code */
+       if (target_alloc_working_area(target, sizeof(fm3_flash_write_code) + 8,
                        &write_algorithm) != ERROR_OK) {
                LOG_WARNING("no working area available, can't do block memory 
writes");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
-       retval = target_write_buffer(target, write_algorithm->address,
+       retval = target_write_buffer(target, write_algorithm->address + 8,
                sizeof(fm3_flash_write_code), fm3_flash_write_code);
        if (retval != ERROR_OK)
                return retval;
 
+       /* Patching 'local variable address' */
+       /* Algorithm: u32DummyRead: */
+       retval = target_write_u32(target, (write_algorithm->address + 8)
+                       + sizeof(fm3_flash_write_code) - 8, 
(write_algorithm->address));
+       if (retval != ERROR_OK)
+               return retval;
+       /* Algorithm: u32FlashResult: */
+       retval = target_write_u32(target, (write_algorithm->address + 8)
+                       + sizeof(fm3_flash_write_code) - 4, 
(write_algorithm->address) + 4);
+       if (retval != ERROR_OK)
+               return retval;
+
+
+
        /* memory buffer */
        while (target_alloc_working_area(target, buffer_size, &source) != 
ERROR_OK) {
                buffer_size /= 2;
@@ -518,26 +533,6 @@ static int fm3_write_block(struct flash_bank *bank, 
uint8_t *buffer,
        while (count > 0) {
                uint32_t thisrun_count = (count > (buffer_size / 2)) ? 
(buffer_size / 2) : count;
 
-               retval = target_write_buffer(target, write_algorithm->address, 
8,
-                               fm3_flash_write_code);
-               if (retval != ERROR_OK)
-                       break;
-
-               /* Patching 'local variable address' for different RAM 
addresses */
-               if (write_algorithm->address != (target->working_area_phys + 
8)) {
-                       /* Algorithm: u32DummyRead: */
-                       retval = target_write_u32(target, 
(write_algorithm->address)
-                               + sizeof(fm3_flash_write_code) - 8, 
(write_algorithm->address) - 8);
-                       if (retval != ERROR_OK)
-                               break;
-
-                       /* Algorithm: u32FlashResult: */
-                       retval = target_write_u32(target, 
(write_algorithm->address)
-                               + sizeof(fm3_flash_write_code) - 4, 
(write_algorithm->address) - 4);
-                       if (retval != ERROR_OK)
-                               break;
-               }
-
                retval = target_write_buffer(target, source->address, 
thisrun_count * 2, buffer);
                if (retval != ERROR_OK)
                        break;
@@ -549,7 +544,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t 
*buffer,
                buf_set_u32(reg_params[4].value, 0, 32, u32FlashSeqAddress2);
 
                retval = target_run_algorithm(target, 0, NULL, 6, reg_params,
-                               write_algorithm->address, 0, 1000, 
&armv7m_info);
+                               (write_algorithm->address + 8), 0, 1000, 
&armv7m_info);
                if (retval != ERROR_OK) {
                        LOG_ERROR("Error executing fm3 Flash programming 
algorithm");
                        retval = ERROR_FLASH_OPERATION_FAILED;
@@ -791,9 +786,7 @@ static int fm3_chip_erase(struct flash_bank *bank)
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       LOG_INFO("Fujitsu MB9[AB]xxx: Chip Erase ... (may take several 
seconds)");
-
-       /* Implement Flash chip erase (mass erase) completely on host */
+       LOG_INFO("Fujitsu MB9[A/B]xxx: Chip Erase ... (may take several 
seconds)");
 
        /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash access) */
        retval = target_write_u32(target, 0x40000000, 0x0001);

-- 

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