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Oleksij Rempel ([email protected]) just uploaded a new patch set to 
Gerrit, which you can find at http://openocd.zylin.com/1929

-- gerrit

commit 73a0ec837e0b5257de4c13d6d936b60d2d686808
Author: Oleksij Rempel <[email protected]>
Date:   Thu Jan 23 09:11:06 2014 +0100

    mips_ejtag.c|h: use version specific IMPs
    
    and make version specifik debug log
    
    Change-Id: I17f7ff757cfa1264a1dadbfe20c5e21de62ef87a
    Signed-off-by: Oleksij Rempel <[email protected]>

diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 6d51c56..5ed1aec 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -341,6 +341,50 @@ static void mips_ejtag_init_mmr(struct mips_ejtag 
*ejtag_info)
        }
 }
 
+static void ejtag_v20_print_imp(struct mips_ejtag *ejtag_info)
+{
+       LOG_DEBUG("EJTAG v2.0: features:%s%s%s%s%s",
+               ejtag_info->impcode & EJTAG_V20_IMP_SDBBP ? " SDBBP_SPECIAL2" : 
" SDBBP",
+               ejtag_info->impcode & EJTAG_V20_IMP_EADDR_NO32BIT ? " 
EADDR>32bit" : " EADDR=32bit",
+               ejtag_info->impcode & EJTAG_V20_IMP_NOPB ? " noPB" : "",
+               ejtag_info->impcode & EJTAG_V20_IMP_NODB ? " noDB" : "",
+               ejtag_info->impcode & EJTAG_V20_IMP_NOIB ? " noIB" : "");
+       LOG_DEBUG("EJTAG v2.0: Break Channels: %i",
+               (ejtag_info->impcode >> EJTAG_V20_IMP_BCHANNELS_SHIFT) &
+               EJTAG_V20_IMP_BCHANNELS_MASK);
+}
+
+static void ejtag_v26_print_imp(struct mips_ejtag *ejtag_info)
+{
+       LOG_DEBUG("EJTAG v2.6: features:%s%s",
+               ejtag_info->impcode & EJTAG_V26_IMP_R3K ? " R3k" : " R4k",
+               ejtag_info->impcode & EJTAG_V26_IMP_DINT ? " DINT" : "");
+}
+
+static void ejtag_main_print_imp(struct mips_ejtag *ejtag_info)
+{
+       LOG_DEBUG("EJTAG main: features:%s%s%s%s%s",
+               ejtag_info->impcode & (1 << 22) ? " ASID_8" : "",
+               ejtag_info->impcode & (1 << 21) ? " ASID_6" : "",
+               ejtag_info->impcode & EJTAG_IMP_MIPS16 ? " MIPS16" : "",
+               ejtag_info->impcode & EJTAG_IMP_NODMA ? " noDMA" : " DMA",
+               ejtag_info->impcode & EJTAG_DCR_MIPS64  ? " MIPS64" : " 
MIPS32");
+
+       switch (ejtag_info->ejtag_version) {
+               case EJTAG_VERSION_20:
+                       ejtag_v20_print_imp(ejtag_info);
+                       break;
+               case EJTAG_VERSION_25:
+               case EJTAG_VERSION_26:
+               case EJTAG_VERSION_31:
+               case EJTAG_VERSION_41:
+               case EJTAG_VERSION_51:
+                       ejtag_v26_print_imp(ejtag_info);
+                       break;
+               default:
+                       break;
+       }
+}
 
 int mips_ejtag_init(struct mips_ejtag *ejtag_info)
 {
@@ -377,14 +421,7 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info)
                        LOG_DEBUG("EJTAG: Unknown Version Detected");
                        break;
        }
-       LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
-               ejtag_info->impcode & EJTAG_IMP_R3K ? " R3k" : " R4k",
-               ejtag_info->impcode & EJTAG_IMP_DINT ? " DINT" : "",
-               ejtag_info->impcode & (1 << 22) ? " ASID_8" : "",
-               ejtag_info->impcode & (1 << 21) ? " ASID_6" : "",
-               ejtag_info->impcode & EJTAG_IMP_MIPS16 ? " MIPS16" : "",
-               ejtag_info->impcode & EJTAG_IMP_NODMA ? " noDMA" : " DMA",
-               ejtag_info->impcode & EJTAG_DCR_MIPS64  ? " MIPS64" : " 
MIPS32");
+       ejtag_main_print_imp(ejtag_info);
 
        if ((ejtag_info->impcode & EJTAG_IMP_NODMA) == 0)
                LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index db20e9d..ba3470d 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -97,11 +97,32 @@
 #define EJTAG_DEBUG_DM                 (1 << 30)
 #define EJTAG_DEBUG_DBD                        (1 << 31)
 
-/* implementaion register bits */
-#define EJTAG_IMP_R3K                  (1 << 28)
-#define EJTAG_IMP_DINT                 (1 << 24)
+/* implementaion MIPS register bits.
+ * Registers marked with V20 or v2.0 mean that,
+ * this registers supported only by EJTAG v2.0.
+ * Lexra or BMIPS would mean, that this bit differs from official EJATG spec. 
*/
+/* v2.0(Lexra) 29 - 1’b1 - Lexra Internal Trace Buffer implemented */
+#define EJTAG_V26_IMP_R3K                      (1 << 28)
+/* v2.0 - 24:25 - 2’b00- No profiling support */
+#define EJTAG_V26_IMP_DINT             (1 << 24)
+#define EJTAG_V20_IMP_SDBBP            (1 << 23) /* 1’b1 - sdbbp is Special2
+                                                    Opcode */
+/* v2.0 - 20 - 1’b0 - Complex Breaks not supported */
+#define EJTAG_V20_IMP_EADDR_NO32BIT    (1 << 19) /* 1’b1 - EJTAG_ADDR > 32 bits
+                                                  wide */
 #define EJTAG_IMP_NODMA                        (1 << 14)
+/* v2.0 - 18 1’b0 - DCache does not keep DMA coherent */
+/* v2.0 - 17 1’b0 - ICache does not keep DMA coherent */
 #define EJTAG_IMP_MIPS16               (1 << 16)
+/* v2.0 - 11:13 external PC trace. Trace PC Width. */
+/* v2.0 - 8:10 external PC trace. PCST Width and DCLK Division Factor */
+#define EJTAG_V20_IMP_NOPB             (1 << 7) /* no processor breaks */
+#define EJTAG_V20_IMP_NODB             (1 << 6) /* no data breaks */
+#define EJTAG_V20_IMP_NOIB             (1 << 5) /* no instruction breaks
+                                                   implementeed */
+/* v2.0 - 1:4 Number of Break Channels. */
+#define EJTAG_V20_IMP_BCHANNELS_MASK   0xf
+#define EJTAG_V20_IMP_BCHANNELS_SHIFT  1
 #define EJTAG_DCR_MIPS64               (1 << 0)
 
 /* Debug Control Register DCR */

-- 

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