As Spencer Oliver wrote:
> > Comparing the board description files, I eventually get to the
> > following differences in the SAM3/4 target description files:
> >
> > +source [find target/swj-dp.tcl]
> >
> > -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
> > -expected-id $_CPUTAPID
> > +swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id
> > $_CPUTAPID
> >
> > Any clues are welcome.
>
> You have found the solution.
> It is a matter of including swj-dp.tcl and updating the cfg to comment
> out any jtag specific cmds, eg.
Thanks for your feedback!
OK, so I came up with the following patch, and got it to work.
Do you guys think this patch is generally applicable? If so, I'll try
the Gerrit procedure.
--- a/tcl/target/at91sam3XXX.cfg 2014-03-10 14:24:05.904668930 +0100
+++ b/tcl/target/at91sam3XXX.cfg 2014-03-13 14:30:50.822514759 +0100
@@ -24,6 +24,9 @@
# at91sam3X8C
# at91sam3X8E
# at91sam3X8H
+
+source [find target/swj-dp.tcl]
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
@@ -36,17 +39,13 @@
set _ENDIAN little
}
-# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG =
0.5MHz
-#
-# Since we may be running of an RC oscilator, we crank down the speed a
-# bit more to be on the safe side. Perhaps superstition, but if are
-# running off a crystal, we can run closer to the limit. Note
-# that there can be a pretty wide band where things are more or less stable.
-
-adapter_khz 500
-
-adapter_nsrst_delay 100
-jtag_ntrst_delay 100
+# Work-area is a space in RAM used for flash programming
+# By default use 16kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x1000
+}
#jtag scan chain
if { [info exists CPUTAPID] } {
@@ -55,18 +54,32 @@
set _CPUTAPID 0x4ba00477
}
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id
$_CPUTAPID
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id
$_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position
$_TARGETNAME
# 16K is plenty, the smallest chip has this much
-$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384
-work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size
$_WORKAREASIZE -work-area-backup 0
$_TARGETNAME configure -event gdb-flash-erase-start {
halt
}
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG =
0.5MHz
+#
+# Since we may be running of an RC oscilator, we crank down the speed a
+# bit more to be on the safe side. Perhaps superstition, but if are
+# running off a crystal, we can run closer to the limit. Note
+# that there can be a pretty wide band where things are more or less stable.
+
+adapter_khz 500
+
+adapter_nsrst_delay 100
+if {$using_jtag} {
+ jtag_ntrst_delay 100
+}
+
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
--
cheers, Joerg .-.-. --... ...-- -.. . DL8DTL
http://www.sax.de/~joerg/
Never trust an operating system you don't have sources for. ;-)
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