This is an automated email from Gerrit. Paul Fertser ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/2122
-- gerrit commit 9f3731b49428294f6579da78c0470e9d2b2e259b Author: Paul Fertser <[email protected]> Date: Mon Apr 28 15:05:02 2014 +0400 Fix some C99 format specifiers As exposed by arm-none-eabi build, fix the wrong modifiers. Change-Id: Ia6ce7c5c1d40e95059525c3e5d81b752df2fea7c Signed-off-by: Paul Fertser <[email protected]> diff --git a/src/flash/nor/at91sam4l.c b/src/flash/nor/at91sam4l.c index 0139f61..a5eb672 100644 --- a/src/flash/nor/at91sam4l.c +++ b/src/flash/nor/at91sam4l.c @@ -35,7 +35,7 @@ #define SAM4L_NUM_SECTORS 16 /* Locations in memory map */ -#define SAM4L_FLASH 0x00000000 /* Flash region */ +#define SAM4L_FLASH ((uint32_t)0x00000000) /* Flash region */ #define SAM4L_FLASH_USER 0x00800000 /* Flash user page region */ #define SAM4L_FLASHCALW 0x400A0000 /* Flash controller */ #define SAM4L_CHIPID 0x400E0740 /* Chip Identification */ @@ -253,7 +253,7 @@ static int sam4l_check_page_erased(struct flash_bank *bank, uint32_t pn, /* Issue a quick page read to verify that we've erased this page */ res = sam4l_flash_command(bank->target, SAM4L_FCMD_QPR, pn); if (res != ERROR_OK) { - LOG_ERROR("Quick page read %d failed", pn); + LOG_ERROR("Quick page read %" PRIu32 " failed", pn); return res; } @@ -307,7 +307,7 @@ static int sam4l_probe(struct flash_bank *bank) chip->flash_kb = 512; break; default: - LOG_ERROR("Unknown flash size (chip ID is %08X), assuming 128K", id); + LOG_ERROR("Unknown flash size (chip ID is %08" PRIx32 "), assuming 128K", id); chip->flash_kb = 128; break; } @@ -351,8 +351,8 @@ static int sam4l_probe(struct flash_bank *bank) /* Done */ chip->probed = true; - LOG_INFO("SAM4L MCU: %s (Rev %c) (%uKB Flash with %d %dB pages, %uKB RAM)", - chip->details ? chip->details->name : "unknown", 'A' + (id & 0xF), + LOG_INFO("SAM4L MCU: %s (Rev %c) (%" PRIu32 "KB Flash with %d %" PRId32 "B pages, %" PRIu32 "KB RAM)", + chip->details ? chip->details->name : "unknown", (char)('A' + (id & 0xF)), chip->flash_kb, chip->num_pages, chip->page_size, chip->ram_kb); return ERROR_OK; diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c index bfd2c6a..17bc8b9 100644 --- a/src/flash/nor/at91samd.c +++ b/src/flash/nor/at91samd.c @@ -26,7 +26,7 @@ #define SAMD_NUM_SECTORS 16 -#define SAMD_FLASH 0x00000000 /* physical Flash memory */ +#define SAMD_FLASH ((uint32_t)0x00000000) /* physical Flash memory */ #define SAMD_DSU 0x41002000 /* Device Service Unit */ #define SAMD_NVMCTRL 0x41004000 /* Non-volatile memory controller */ @@ -218,7 +218,7 @@ static int samd_probe(struct flash_bank *bank) * multiplied by the number of pages. */ if (bank->size != chip->num_pages * chip->page_size) { LOG_WARNING("SAMD: bank size doesn't match NVM parameters. " - "Identified %uKB Flash but NVMCTRL reports %u %uB pages", + "Identified %" PRIu32 "KB Flash but NVMCTRL reports %u %" PRIu32 "B pages", part->flash_kb, chip->num_pages, chip->page_size); } @@ -243,7 +243,7 @@ static int samd_probe(struct flash_bank *bank) /* Done */ chip->probed = true; - LOG_INFO("SAMD MCU: %s (%uKB Flash, %uKB RAM)", part->name, + LOG_INFO("SAMD MCU: %s (%" PRIu32 "KB Flash, %" PRIu32 "KB RAM)", part->name, part->flash_kb, part->ram_kb); return ERROR_OK; @@ -337,7 +337,7 @@ static int samd_erase_row(struct flash_bank *bank, uint32_t address) } if (res != ERROR_OK || error) { - LOG_ERROR("Failed to erase row containing %08X" PRIx32, address); + LOG_ERROR("Failed to erase row containing %08" PRIx32, address); return ERROR_FAIL; } diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index f29a95d..a155900 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -1225,8 +1225,8 @@ static int dap_rom_display(struct command_context *cmd_ctx, "start address 0x%" PRIx32, component_base, /* component may take multiple 4K pages */ (uint32_t)(component_base - 0x1000*(c_pid4 >> 4))); - command_print(cmd_ctx, "\t\tComponent class is 0x%x, %s", - (c_cid1 >> 4) & 0xf, + command_print(cmd_ctx, "\t\tComponent class is 0x%" PRIx8 ", %s", + (uint8_t)((c_cid1 >> 4) & 0xf), /* See ARM IHI 0029B Table 3-3 */ class_description[(c_cid1 >> 4) & 0xf]); @@ -1337,8 +1337,8 @@ static int dap_rom_display(struct command_context *cmd_ctx, } break; } - command_print(cmd_ctx, "\t\tType is 0x%02x, %s, %s", - devtype & 0xff, + command_print(cmd_ctx, "\t\tType is 0x%02" PRIx8 ", %s, %s", + (uint8_t)(devtype & 0xff), major, subtype); /* REVISIT also show 0xfc8 DevId */ } diff --git a/src/target/target.c b/src/target/target.c index 32ab117..9416b25 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -5712,7 +5712,7 @@ COMMAND_HANDLER(handle_test_mem_access_command) read_buf[i] = read_ref[i]; } command_print_sameline(CMD_CTX, - "Test read %d x %d @ %d to %saligned buffer: ", count, + "Test read %" PRIu32 " x %d @ %d to %saligned buffer: ", count, size, offset, host_offset ? "un" : ""); struct duration bench; @@ -5784,7 +5784,7 @@ out: for (size_t i = 0; i < host_bufsiz; i++) write_buf[i] = rand(); command_print_sameline(CMD_CTX, - "Test write %d x %d @ %d from %saligned buffer: ", count, + "Test write %" PRIu32 " x %d @ %d from %saligned buffer: ", count, size, offset, host_offset ? "un" : ""); retval = target_write_memory(target, wa->address, 1, num_bytes, test_pattern); -- ------------------------------------------------------------------------------ "Accelerate Dev Cycles with Automated Cross-Browser Testing - For FREE Instantly run your Selenium tests across 300+ browser/OS combos. Get unparalleled scalability from the best Selenium testing platform available. Simple to use. Nothing to install. Get started now for free." http://p.sf.net/sfu/SauceLabs _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
