Hi Paul,

On 05/15/2014 10:35 AM, Paul Fertser wrote:
> On Tue, May 13, 2014 at 04:00:54PM -0600, Steve McKown wrote:
>> Just upgraded to v0.8.0.  Programming the Freescale TWR-K20K72M board is
>> broken.  The problem is selection of the wrong flash granularity,
>> generating an access violation (FSTAT = a0).
>
> That's an important information, thank you for noticing and
> investigating.
>
>> I bisected openocd; the problem is with commit hash
>> 1ab86419d72dd90dbbde028263582346fa1e9dd1.
>>
>> The TWR-K20D72M board is populated with a PK20DX256VLL7 part, which does
>> not seem to follow the rules presented by the K20 SF1 reference manual.
>>    Specifically, its SDID is 0x000000FF.
>
> Can you possibly send a request to a Freescale FAE to clarify this
> issue please? I know their support is quite responsive and can provide
> sane technical answers.
>
> It would be really nice to learn exactly why is it that way and what
> we should expect from the other parts to have clean and maintainable
> code in the end.

I received provisionally helpful information from Freescale over the 
past several days.  Here is the most recent and most useful reply:

"Actually there is no explicit doc for that topic so far, but I 
consulted our AE team for this question, and they suggested building a 
lookup table for that purpose, you know, the sector size can be 
concluded from family and flash size, which can be referred to 
SIM_SDID[FAMID] and SIM_FCFG1[NVMSIZE] [PFSIZE] , so that you may build 
such a table to know the flash sector size for each chip."

The key bit seems to be "you know, the sector size can be concluded from 
family and flash size".  I can't get to it for a week or two, but I can 
push a proposed change into Gerrit to try to implement this technique. 
If someone else wants to run with this information sooner, all the 
better.  In any event, I can test whatever method we end up with against 
6 Kinetis K variants here in-house.

All the best,
Steve

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