Hi all.
I just had this strange experience. It all sounds very unreal.
First of all: a NOP that is HardFaulting.
I'm using a LPC1342, running a small program that blinks a standard led and
changes colors on a RGB-led.
The program hardfaulted twice on a NOP instruction.
I'm not sure what can cause this; maybe problems with my cheapBay power-supply.
I've attached the debug-session as a file (for those interested).
What I find peculiar, is that ... reading memory from OpenOCD seems to be
inconsistent.
Note: I am on a Big-Endian platform, so this could perhaps be where it's going
wrong.
-But then again... There's this hardfault, exactly where the byte is read
incorrectly. Hmm.
...Well, the LPC1342 does not know that OpenOCD might read the address
incorrectly if I'm on a Big Endian platform, but still it hardfaults.
Perhaps it's not the mdb that reads the memory contents correctly, but mdw and
mdh ?
Note: If I reset the microcontroller, the program-loop runs again.
At some point, it'll probably hardfault again, but that's after many
iterations, and I do not push anything on the stack.
-There's one subroutine call only.
Love
Jens
# Let's see the registers... PC where is it ?
> reg
===== arm v7m registers
(0) r0 (/32): 0x00000200
(1) r1 (/32): 0x00000000
(2) r2 (/32): 0x00000011
(3) r3 (/32): 0x50010000
(4) r4 (/32): 0x00000000
(5) r5 (/32): 0x50010000
(6) r6 (/32): 0x00000000
(7) r7 (/32): 0x00000195
(8) r8 (/32): 0x00000000
(9) r9 (/32): 0x00000000
(10) r10 (/32): 0x00000000
(11) r11 (/32): 0x00000000
(12) r12 (/32): 0x00000000
(13) sp (/32): 0x10000FA8
(14) lr (/32): 0xFFFFFFF9
(15) pc (/32): 0x0000030A
(16) xPSR (/32): 0x41000003
(17) msp (/32): 0x10000FA8
(18) psp (/32): 0x00000000
(19) primask (/1): 0x00
(20) basepri (/8): 0x00
(21) faultmask (/1): 0x00
(22) control (/2): 0x00
===== Cortex-M DWT registers
(23) dwt_ctrl (/32)
(24) dwt_cyccnt (/32)
(25) dwt_0_comp (/32)
(26) dwt_0_mask (/4)
(27) dwt_0_function (/32)
(28) dwt_1_comp (/32)
(29) dwt_1_mask (/4)
(30) dwt_1_function (/32)
(31) dwt_2_comp (/32)
(32) dwt_2_mask (/4)
(33) dwt_2_function (/32)
(34) dwt_3_comp (/32)
(35) dwt_3_mask (/4)
(36) dwt_3_function (/32)
# Let's see the code PC is currently at...
> arm disassemble 0x00000300 16
0x00000300 0x00e9 LSLS r1, r5, #0x03
0x00000302 0x1000 ASRS r0, r0, #0x20
0x00000304 0xbf30 WFI
0x00000306 0xe7fd B 0x00000304
0x00000308 0xbf30 WFI
0x0000030a 0xe7fd B 0x00000308
0x0000030c 0xbf30 WFI
0x0000030e 0xe7fd B 0x0000030c
0x00000310 0xbf30 WFI
0x00000312 0xe7fd B 0x00000310
0x00000314 0xbf30 WFI
0x00000316 0xe7fd B 0x00000314
0x00000318 0xbf30 WFI
0x0000031a 0xe7fd B 0x00000318
0x0000031c 0xbf30 WFI
0x0000031e 0xe7fd B 0x0000031c
# Alright, it seems we're in one of the exception handlers (at address 0x30a),
let's see which one...
> mdw 0 8
0x00000000: 10001000 00000375 00000305 00000309 0000030d 00000311 00000315
efffdd4a
# sp, reset handler, NMI, hardfault... HardFault it seems. So what does the
stack look like ?
> mdw 0x10000fa8 30
0x10000fa8: 00000200 00000000 00000011 50010000 00000000 000002f3 00000266
41000400
0x10000fc8: 00000f10 50000000 100000e9 000002f3 00000275 00000534 efffdd4a
000005b0
0x10000fe8: 40048000 000003c5 10001000 00000000 40048000 1fff12d3 319d0b25
701252d0
0x10001008: 880530f9 9000a08c aaa31748 378c7a7b 6fc1eca7 84c96e02
# Appears we've stranded at address 0x266. What's there ?
> arm disassemble 0x266 20
0x00000266 0xb700 UNDEFINED INSTRUCTION
0x00000268 0xbf00 NOP
0x0000026a 0x3a05 SUBS r2, #0x05
0x0000026c 0xd19f BNE 0x000001ae
0x0000026e 0xbd70 POP {r4, r5, r6, r15}
0x00000270 0x0000 LSLS r0, r0, #00
0x00000272 0x5001 STR r1, [r0, r0]
0x00000274 0xb5f8 PUSH {r3, r4, r5, r6, r7, r14}
0x00000276 0xf44f7380 MOV.W r3, #256 ; 0x00000100
0x0000027a 0xf04f45a0 MOV.W r5, #1342177280 ; 0x50000000
0x0000027e 0xf8c53400 STR.W r3, [r5, #1024] ; 0x400
0x00000282 0x4b1d LDR r3, [pc, #0x74] ; 0x000002f8
0x00000284 0x2000 MOVS r0, #00
0x00000286 0x681a LDR r2, [r3, #0]
0x00000288 0x4e1c LDR r6, [pc, #0x70] ; 0x000002fc
0x0000028a 0xf4427280 ORR r2, r2, #256 ; 0x00000100
0x0000028e 0x601a STR r2, [r3, #0]
0x00000290 0xf44f7200 MOV.W r2, #512 ; 0x00000200
0x00000294 0xf5034300 ADD.W r3, r3, #32768 ; 0x00008000
0x00000298 0xf8c32800 STR.W r2, [r3, #2048] ; 0x800
# An undefined instruction... Why do I not believe that ? -The program is
running from Flash and has run for a while. Sure about this ?
> arm disassemble 0x266 20
0x00000266 0xb700 UNDEFINED INSTRUCTION
0x00000268 0xbf00 NOP
0x0000026a 0x3a05 SUBS r2, #0x05
0x0000026c 0xd19f BNE 0x000001ae
0x0000026e 0xbd70 POP {r4, r5, r6, r15}
0x00000270 0x0000 LSLS r0, r0, #00
0x00000272 0x5001 STR r1, [r0, r0]
0x00000274 0xb5f8 PUSH {r3, r4, r5, r6, r7, r14}
0x00000276 0xf44f7380 MOV.W r3, #256 ; 0x00000100
0x0000027a 0xf04f45a0 MOV.W r5, #1342177280 ; 0x50000000
0x0000027e 0xf8c53400 STR.W r3, [r5, #1024] ; 0x400
0x00000282 0x4b1d LDR r3, [pc, #0x74] ; 0x000002f8
0x00000284 0x2000 MOVS r0, #00
0x00000286 0x681a LDR r2, [r3, #0]
0x00000288 0x4e1c LDR r6, [pc, #0x70] ; 0x000002fc
0x0000028a 0xf4427280 ORR r2, r2, #256 ; 0x00000100
0x0000028e 0x601a STR r2, [r3, #0]
0x00000290 0xf44f7200 MOV.W r2, #512 ; 0x00000200
0x00000294 0xf5034300 ADD.W r3, r3, #32768 ; 0x00008000
0x00000298 0xf8c32800 STR.W r2, [r3, #2048] ; 0x800
# (It's sure). Let's see the code above.
> arm disassemble 0x260 20
0x00000260 0xbf01 ITEEE EQ
0x00000262 0xbf00 NOP
0x00000264 0xbf00 NOP
0x00000266 0xb700 UNDEFINED INSTRUCTION
0x00000268 0xbf00 NOP
0x0000026a 0x3a05 SUBS r2, #0x05
0x0000026c 0xd19f BNE 0x000001ae
0x0000026e 0xbd70 POP {r4, r5, r6, r15}
0x00000270 0x0000 LSLS r0, r0, #00
0x00000272 0x5001 STR r1, [r0, r0]
0x00000274 0xb5f8 PUSH {r3, r4, r5, r6, r7, r14}
0x00000276 0xf44f7380 MOV.W r3, #256 ; 0x00000100
0x0000027a 0xf04f45a0 MOV.W r5, #1342177280 ; 0x50000000
0x0000027e 0xf8c53400 STR.W r3, [r5, #1024] ; 0x400
0x00000282 0x4b1d LDR r3, [pc, #0x74] ; 0x000002f8
0x00000284 0x2000 MOVS r0, #00
0x00000286 0x681a LDR r2, [r3, #0]
0x00000288 0x4e1c LDR r6, [pc, #0x70] ; 0x000002fc
0x0000028a 0xf4427280 ORR r2, r2, #256 ; 0x00000100
0x0000028e 0x601a STR r2, [r3, #0]
# Hmm, I don't like that 0xb7. It does not belong there. Those should have been
NOP instructions up there. Try disassembling as an odd address...
> arm disassemble 0x261 20
0x00000260 0xbf00 NOP
0x00000262 0xbf00 NOP
0x00000264 0xbf00 NOP
0x00000266 0xbf00 NOP
0x00000268 0xbf00 NOP
0x0000026a 0x3a01 SUBS r2, #0x01
0x0000026c 0xd19f BNE 0x000001ae
0x0000026e 0xbd70 POP {r4, r5, r6, r15}
0x00000270 0x0000 LSLS r0, r0, #00
0x00000272 0x5001 STR r1, [r0, r0]
0x00000274 0xb5f8 PUSH {r3, r4, r5, r6, r7, r14}
0x00000276 0xf44f7380 MOV.W r3, #256 ; 0x00000100
0x0000027a 0xf04f45a0 MOV.W r5, #1342177280 ; 0x50000000
0x0000027e 0xf8c53400 STR.W r3, [r5, #1024] ; 0x400
0x00000282 0x4b1d LDR r3, [pc, #0x74] ; 0x000002f8
0x00000284 0x2000 MOVS r0, #00
0x00000286 0x681a LDR r2, [r3, #0]
0x00000288 0x4e1c LDR r6, [pc, #0x70] ; 0x000002fc
0x0000028a 0xf4427280 ORR r2, r2, #256 ; 0x00000100
0x0000028e 0x601a STR r2, [r3, #0]
# Weird. Now the 0xb7 has changed to 0xbf. Really sure about this ?
> arm disassemble 0x260 20
0x00000260 0xbf01 ITEEE EQ
0x00000262 0xbf00 NOP
0x00000264 0xbf00 NOP
0x00000266 0xb700 UNDEFINED INSTRUCTION
0x00000268 0xbf00 NOP
0x0000026a 0x3a05 SUBS r2, #0x05
0x0000026c 0xd19f BNE 0x000001ae
0x0000026e 0xbd70 POP {r4, r5, r6, r15}
0x00000270 0x0000 LSLS r0, r0, #00
0x00000272 0x5001 STR r1, [r0, r0]
0x00000274 0xb5f8 PUSH {r3, r4, r5, r6, r7, r14}
0x00000276 0xf44f7380 MOV.W r3, #256 ; 0x00000100
0x0000027a 0xf04f45a0 MOV.W r5, #1342177280 ; 0x50000000
0x0000027e 0xf8c53400 STR.W r3, [r5, #1024] ; 0x400
0x00000282 0x4b1d LDR r3, [pc, #0x74] ; 0x000002f8
0x00000284 0x2000 MOVS r0, #00
0x00000286 0x681a LDR r2, [r3, #0]
0x00000288 0x4e1c LDR r6, [pc, #0x70] ; 0x000002fc
0x0000028a 0xf4427280 ORR r2, r2, #256 ; 0x00000100
0x0000028e 0x601a STR r2, [r3, #0]
# Definitely sure. But what's really in memory ?
> mdb 0x260 32
0x00000260: 00 bf 00 bf 00 bf 00 bf 00 bf 01 3a 9f d1 70 bd 00 00 01 50 f8 b5
4f f4 80 73 4f f0 a0 45 c5 f8
# Hmm, 0xbf and 0x00. Are you really sure about this ?
> mdh 0x260 32
0x00000260: bf01 bf00 bf00 b700 bf00 3a05 d19f bd70 0000 5001 b5f8 f44f 7380
f04f 45a0 f8c5
0x00000280: 3400 4b1d 2000 681a 4e1c f442 7280 601a f44f 7200 f503 4300 f8c3
2800 f503 4300
# Really really sure ?
> mdw 0x260 32
0x00000260: bf00bf01 b700bf00 3a05bf00 bd70d19f 50010000 f44fb5f8 f04f7380
f8c545a0
0x00000280: 4b1d3400 681a2000 f4424e1c 601a7280 7200f44f 4300f503 2800f8c3
4300f503
0x000002a0: 4601681a 7200f442 4602601a 463747b0 24004e13 3400f8d5 70faf44f
7380f483
0x000002c0: 3400f8c5 f8d547b0 f44f3400 f48370fa f8c57380 47b03400 0040f344
0180f344
# Something wierd is going on. A nop instruction that HardFaults, and memory
that isn't what it is.
# Let's try and see if that ITEEE EQ is right...
> arm disassemble 0x250 32
0x00000250 0xbf00 NOP
0x00000252 0xbf00 NOP
0x00000254 0xbf00 NOP
0x00000256 0xbf00 NOP
0x00000258 0xbf00 NOP
0x0000025a 0xbf00 NOP
0x0000025c 0xbf00 NOP
0x0000025e 0xbf00 NOP
0x00000260 0xbf01 ITEEE EQ
0x00000262 0xbf00 NOP
0x00000264 0xbf00 NOP
0x00000266 0xb700 UNDEFINED INSTRUCTION
0x00000268 0xbf00 NOP
0x0000026a 0x3a05 SUBS r2, #0x05
0x0000026c 0xd19f BNE 0x000001ae
0x0000026e 0xbd70 POP {r4, r5, r6, r15}
0x00000270 0x0000 LSLS r0, r0, #00
0x00000272 0x5001 STR r1, [r0, r0]
0x00000274 0xb5f8 PUSH {r3, r4, r5, r6, r7, r14}
0x00000276 0xf44f7380 MOV.W r3, #256 ; 0x00000100
0x0000027a 0xf04f45a0 MOV.W r5, #1342177280 ; 0x50000000
0x0000027e 0xf8c53400 STR.W r3, [r5, #1024] ; 0x400
0x00000282 0x4b1d LDR r3, [pc, #0x74] ; 0x000002f8
0x00000284 0x2000 MOVS r0, #00
0x00000286 0x681a LDR r2, [r3, #0]
0x00000288 0x4e1c LDR r6, [pc, #0x70] ; 0x000002fc
0x0000028a 0xf4427280 ORR r2, r2, #256 ; 0x00000100
0x0000028e 0x601a STR r2, [r3, #0]
0x00000290 0xf44f7200 MOV.W r2, #512 ; 0x00000200
0x00000294 0xf5034300 ADD.W r3, r3, #32768 ; 0x00008000
0x00000298 0xf8c32800 STR.W r2, [r3, #2048] ; 0x800
0x0000029c 0xf5034300 ADD.W r3, r3, #32768 ; 0x00008000
# And disassemble the 'odd' (thumb) address...
> arm disassemble 0x251 32
0x00000250 0xbf00 NOP
0x00000252 0xbf00 NOP
0x00000254 0xbf00 NOP
0x00000256 0xbf00 NOP
0x00000258 0xbf00 NOP
0x0000025a 0xbf00 NOP
0x0000025c 0xbf00 NOP
0x0000025e 0xbf00 NOP
0x00000260 0xbf00 NOP
0x00000262 0xbf00 NOP
0x00000264 0xbf00 NOP
0x00000266 0xbf00 NOP
0x00000268 0xbf00 NOP
0x0000026a 0x3a01 SUBS r2, #0x01
0x0000026c 0xd19f BNE 0x000001ae
0x0000026e 0xbd70 POP {r4, r5, r6, r15}
0x00000270 0x0000 LSLS r0, r0, #00
0x00000272 0x5001 STR r1, [r0, r0]
0x00000274 0xb5f8 PUSH {r3, r4, r5, r6, r7, r14}
0x00000276 0xf44f7380 MOV.W r3, #256 ; 0x00000100
0x0000027a 0xf04f45a0 MOV.W r5, #1342177280 ; 0x50000000
0x0000027e 0xf8c53400 STR.W r3, [r5, #1024] ; 0x400
0x00000282 0x4b1d LDR r3, [pc, #0x74] ; 0x000002f8
0x00000284 0x2000 MOVS r0, #00
0x00000286 0x681a LDR r2, [r3, #0]
0x00000288 0x4e1c LDR r6, [pc, #0x70] ; 0x000002fc
0x0000028a 0xf4427280 ORR r2, r2, #256 ; 0x00000100
0x0000028e 0x601a STR r2, [r3, #0]
0x00000290 0xf44f7200 MOV.W r2, #512 ; 0x00000200
0x00000294 0xf5034300 ADD.W r3, r3, #32768 ; 0x00008000
0x00000298 0xf8c32800 STR.W r2, [r3, #2048] ; 0x800
0x0000029c 0xf5034300 ADD.W r3, r3, #32768 ; 0x00008000
# Definitely; something strange is going on.
------------------------------------------------------------------------------
Slashdot TV.
Video for Nerds. Stuff that matters.
http://tv.slashdot.org/
_______________________________________________
OpenOCD-devel mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/openocd-devel
