Hi Stian. On Mon, 08 Sep 2014 11:53:47 +0200, [email protected] wrote: > >> Isn't it strange that disassembling from an even address shows a >> 'ruined' disassembly, while disassembling from an odd address shows >> the 'perfect' disassembly ?? >> -And even more peculiar - that the 'ruined' disassembly seems to be >> the correct one ? > > I might be wrong here, but what comes from the back of my mind is: ARM > cores, the least significant bit in the PC register tells if you are > using thumb instruction set or not, and arm instructions is therefor > 16bit aligned.
Yes, that is true, I've been thinking about this too, which was why I tried disassembling an odd address. ;) But still that doesn't explain the instruction at address 0x260. It's surrounded by NOP instructions and should have been a NOP itself. So the "memory" must be either read incorrectly or corrupted (temporarily). The funny thing is that when disassembling as 'odd' addresses, where the memory contents are probably read multiple times (in order to read a halfword, the memory contents will be read twice, correct ? -Once for the upper byte, once for the lower byte). That means it seems Andreas' theory is correct, because when reading bytes, I guess the flash memory gets more time to 'settle', than when taking the quicker route, reading halfwords (and maybe full words). > So decoding on odd and even addresses might trigger the > decoder to disassemble as thumb or not. Uhm, could be, yes. But becase the strange instructions are surrounded by instructions of the same type, which are 'intact', then I believe this is not be the case, thus I haven't studied the binary opcode values (in addition, my mind has trouble reading Little Endian). I'm not going to dismiss your input, though - not before being certain what the cause is. ;) Love Jens ------------------------------------------------------------------------------ Want excitement? Manually upgrade your production database. When you want reliability, choose Perforce Perforce version control. Predictably reliable. http://pubads.g.doubleclick.net/gampad/clk?id=157508191&iu=/4140/ostg.clktrk _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
