This is an automated email from Gerrit. Antony Pavlov ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/2338
-- gerrit commit 2a98a2153e60ca1dba4187d2bc50f96e786f3529 Author: Antony Pavlov <[email protected]> Date: Tue Oct 7 12:36:55 2014 +0400 mips32: fix typos Change-Id: Ibb98fe3da68bf670a5bb83600bb49647db8a4163 Signed-off-by: Antony Pavlov <[email protected]> diff --git a/src/target/mips32.c b/src/target/mips32.c index d842705..75197f1 100644 --- a/src/target/mips32.c +++ b/src/target/mips32.c @@ -289,7 +289,7 @@ int mips32_init_arch_info(struct target *target, struct mips32_common *mips32, s mips32->common_magic = MIPS32_COMMON_MAGIC; mips32->fast_data_area = NULL; - /* has breakpoint/watchpint unit been scanned */ + /* has breakpoint/watchpoint unit been scanned */ mips32->bp_scanned = 0; mips32->data_break_list = NULL; diff --git a/src/target/mips32.h b/src/target/mips32.h index 951b2ed..4f44384 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -203,7 +203,7 @@ struct mips32_algorithm { #define MIPS32_SYNCI_STEP 0x1 /* reg num od address step size to be used with synci instruction */ /** - * Cache operations definietions + * Cache operations definitions * Operation field is 5 bits long : * 1) bits 1..0 hold cache type * 2) bits 4..2 hold operation code -- ------------------------------------------------------------------------------ Meet PCI DSS 3.0 Compliance Requirements with EventLog Analyzer Achieve PCI DSS 3.0 Compliant Status with Out-of-the-box PCI DSS Reports Are you Audit-Ready for PCI DSS 3.0 Compliance? Download White paper Comply to PCI DSS 3.0 Requirement 10 and 11.5 with EventLog Analyzer http://pubads.g.doubleclick.net/gampad/clk?id=154622311&iu=/4140/ostg.clktrk _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
