This is an automated email from Gerrit. Evan Hunter ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/2398
-- gerrit commit 43bb35141c1ecea18e1539bf8ceed7cc5f8a33f1 Author: Evan Hunter <[email protected]> Date: Fri Nov 21 17:42:23 2014 +0000 jtag: Avoid extra SRSTn resets when connecting Previously the jtag_add_reset(1, 0) caused the processor to be released, and if SRSTn existed then it would then be reset again two lines later. Change-Id: I58b7a12607f46f83caa7ed3b3cebc4195eb51ef6 Signed-off-by: Evan Hunter <[email protected]> diff --git a/src/jtag/core.c b/src/jtag/core.c index f82b05e..15e01b8 100644 --- a/src/jtag/core.c +++ b/src/jtag/core.c @@ -1547,11 +1547,12 @@ int jtag_init_reset(struct command_context *cmd_ctx) * REVISIT once Tcl code can read the reset_config modes, this won't * need to be a C routine at all... */ - jtag_add_reset(1, 0); /* TAP_RESET, using TMS+TCK or TRST */ if (jtag_reset_config & RESET_HAS_SRST) { jtag_add_reset(1, 1); if ((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0) jtag_add_reset(0, 1); + } else { + jtag_add_reset(1, 0); /* TAP_RESET, using TMS+TCK or TRST */ } /* some targets enable us to connect with srst asserted */ -- ------------------------------------------------------------------------------ Download BIRT iHub F-Type - The Free Enterprise-Grade BIRT Server from Actuate! Instantly Supercharge Your Business Reports and Dashboards with Interactivity, Sharing, Native Excel Exports, App Integration & more Get technology previously reserved for billion-dollar corporations, FREE http://pubads.g.doubleclick.net/gampad/clk?id=157005751&iu=/4140/ostg.clktrk _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
