This is an automated email from Gerrit. David Ung ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/2497
-- gerrit commit e8b7243a83ed5aa7eba93440b63f5722ddc1ee4f Author: David Ung <[email protected]> Date: Thu Jan 15 17:22:20 2015 -0800 arm_dpm: Add arch_mode parameter to arm_dpm_setup Extend the arm_dpm_setup function with new arch_mode parameter in anticipation for aarch64 support. Change-Id: I72ce0486b31a2760600fdd2b57b0955b406e4e44 Signed-off-by: David Ung <[email protected]> diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c index 9271a2b..1b38b29 100644 --- a/src/target/arm11_dbgtap.c +++ b/src/target/arm11_dbgtap.c @@ -1179,7 +1179,7 @@ int arm11_dpm_init(struct arm11_common *arm11, uint32_t didr) dpm->bpwp_enable = arm11_bpwp_enable; dpm->bpwp_disable = arm11_bpwp_disable; - retval = arm_dpm_setup(dpm); + retval = arm_dpm_setup(dpm, 32); if (retval != ERROR_OK) return retval; diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c index b8f392c..7f31833 100644 --- a/src/target/arm_dpm.c +++ b/src/target/arm_dpm.c @@ -936,7 +936,7 @@ void arm_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dscr) * * Oh, and watchpoints. Yeah. */ -int arm_dpm_setup(struct arm_dpm *dpm) +int arm_dpm_setup(struct arm_dpm *dpm, int arch_mode) { struct arm *arm = dpm->arm; struct target *target = arm->target; @@ -949,12 +949,17 @@ int arm_dpm_setup(struct arm_dpm *dpm) arm->read_core_reg = arm_dpm_read_core_reg; arm->write_core_reg = arm_dpm_write_core_reg; - cache = arm_build_reg_cache(target, arm); + if (arch_mode == 64) + ; + /* cache = armv8_build_reg_cache(target); */ + else { + cache = arm_build_reg_cache(target, arm); + *register_get_last_cache_p(&target->reg_cache) = cache; + } + if (!cache) return ERROR_FAIL; - *register_get_last_cache_p(&target->reg_cache) = cache; - /* coprocessor access setup */ arm->mrc = dpm_mrc; arm->mcr = dpm_mcr; diff --git a/src/target/arm_dpm.h b/src/target/arm_dpm.h index 73ed1bc..6c56ac3 100644 --- a/src/target/arm_dpm.h +++ b/src/target/arm_dpm.h @@ -129,7 +129,7 @@ struct arm_dpm { /* FIXME -- read/write DCSR methods and symbols */ }; -int arm_dpm_setup(struct arm_dpm *dpm); +int arm_dpm_setup(struct arm_dpm *dpm, int arch_mode); int arm_dpm_initialize(struct arm_dpm *dpm); int arm_dpm_read_current_registers(struct arm_dpm *); diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 6e0e52c..fff8b4d 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -775,7 +775,7 @@ static int cortex_a_dpm_setup(struct cortex_a_common *a, uint32_t didr) dpm->bpwp_enable = cortex_a_bpwp_enable; dpm->bpwp_disable = cortex_a_bpwp_disable; - retval = arm_dpm_setup(dpm); + retval = arm_dpm_setup(dpm, 32); if (retval == ERROR_OK) retval = arm_dpm_initialize(dpm); -- ------------------------------------------------------------------------------ New Year. New Location. New Benefits. New Data Center in Ashburn, VA. GigeNET is offering a free month of service with a new server in Ashburn. Choose from 2 high performing configs, both with 100TB of bandwidth. Higher redundancy.Lower latency.Increased capacity.Completely compliant. http://p.sf.net/sfu/gigenet _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
