This is an automated email from Gerrit.

David Ung ([email protected]) just uploaded a new patch set to Gerrit, which 
you can find at http://openocd.zylin.com/2735

-- gerrit

commit 1095add357c894510d1dd1a3971651dc185c4e35
Author: David Ung <[email protected]>
Date:   Fri Apr 3 16:55:59 2015 -0700

    arm_dpm: Add new state ARM_STATE_AARCH64
    
    Add new enum ARM_STATE_AARCH64 to the list of possible states.
    
    Change-Id: I3cb2df70f8d5803a63d8374bf3eb75de988e24f8
    Signed-off-by: David Ung <[email protected]>

diff --git a/src/target/arm.h b/src/target/arm.h
index 2a4bb1d..ffbc794 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -79,6 +79,7 @@ enum arm_state {
        ARM_STATE_THUMB,
        ARM_STATE_JAZELLE,
        ARM_STATE_THUMB_EE,
+       ARM_STATE_AARCH64,
 };
 
 #define ARM_COMMON_MAGIC 0x0A450A45
diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 5df625f..1c7a27d 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -167,6 +167,9 @@ static int dpm_read_reg(struct arm_dpm *dpm, struct reg *r, 
unsigned regnum)
                                        /* core-specific ... ? */
                                        LOG_WARNING("Jazelle PC adjustment 
unknown");
                                        break;
+                               case ARM_STATE_AARCH64:
+                                       LOG_ERROR("AARCH64: 32bit read 
requested");
+                                       break;
                        }
                        break;
                default:
@@ -882,6 +885,7 @@ void arm_dpm_report_wfar(struct arm_dpm *dpm, uint32_t addr)
                        addr -= 4;
                        break;
                case ARM_STATE_JAZELLE:
+               case ARM_STATE_AARCH64:
                        /* ?? */
                        break;
        }
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index e5bcb87..7e6c6d7 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -1017,6 +1017,9 @@ static int cortex_a_internal_restore(struct target 
*target, int current,
                case ARM_STATE_JAZELLE:
                        LOG_ERROR("How do I resume into Jazelle state??");
                        return ERROR_FAIL;
+               case ARM_STATE_AARCH64:
+                       LOG_ERROR("Shoudn't be in AARCH64 state");
+                       return ERROR_FAIL;
        }
        LOG_DEBUG("resume pc = 0x%08" PRIx32, resume_pc);
        buf_set_u32(arm->pc->value, 0, 32, resume_pc);

-- 

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