This is an automated email from Gerrit.

Oleksij Rempel ([email protected]) just uploaded a new patch set to 
Gerrit, which you can find at http://openocd.zylin.com/2835

-- gerrit

commit 7d97d09cbd2cf8331233c6cfded654af5a393319
Author: Oleksij Rempel <[email protected]>
Date:   Wed Jun 17 20:57:34 2015 +0200

    tcl/target|board: add config Atheros ar2313
    
    Add configs for Atheros ar2313 MIPS based WiSoC and
    board based on this chip: Netgear WP102
    
    Change-Id: Id93957b5d5851a272f15be35f9f448a9ce6d8a08
    Signed-off-by: Oleksij Rempel <[email protected]>

diff --git a/tcl/board/netgear-wg102.cfg b/tcl/board/netgear-wg102.cfg
new file mode 100644
index 0000000..ea49370
--- /dev/null
+++ b/tcl/board/netgear-wg102.cfg
@@ -0,0 +1,40 @@
+source [find target/atheros_ar2313.cfg]
+
+reset_config trst_and_srst
+
+$_TARGETNAME configure -event reset-init {
+       mips32 cp0 12 0 0x10400000
+
+       # configure sdram controller
+       mww 0xb8300004 0x0e03
+       sleep 100
+       mww 0xb8300004 0x0e01
+       mww 0xb8300008 0x10
+       sleep 500
+       mww 0xb8300004 0x0e02
+
+       mww 0xb8300000 0x6c0088
+       mww 0xb8300008 0x57e
+       mww 0xb8300004 0x0e00
+       mww 0xb8300004 0xb00
+
+       # configure flash
+       #                 0x00000001 - 0x01 << FLASHCTL_IDCY_S
+       #                 0x000000e0 - 0x07 << FLASHCTL_WST1_S
+       # FLASHCTL_RBLE   0x00000400 - Read byte lane enable
+       #                 0x00003800 - 0x07 << FLASHCTL_WST2_S
+       # FLASHCTL_AC_8M  0x00060000 - Size of flash
+       # FLASHCTL_E      0x00080000 - Flash bank enable (added)
+       # FLASHCTL_WP     0x04000000 - write protect. If used, CFI mode wont 
work!!
+       # FLASHCTL_MWx16  0x10000000 - 16bit mode. Do not use it!!
+       # FLASHCTL_MWx8   0x00000000 - 8bit mode.
+       mww 0xb8400000 0x000d3ce1
+}
+
+# setup working area somewhere in kseg1.
+# kseg1 = 0xa0000000 - 0xbfffffff. It is unmapped uncached kernel segment.
+# starting with 0xb8000000 we have differen HW IOs
+$_TARGETNAME configure -work-area-phys 0xa0000000 -work-area-size 0x1000
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0xbe000000 0x00400000 1 1 $_TARGETNAME x16_as_x8
diff --git a/tcl/target/atheros_ar2313.cfg b/tcl/target/atheros_ar2313.cfg
new file mode 100644
index 0000000..0966c6c
--- /dev/null
+++ b/tcl/target/atheros_ar2313.cfg
@@ -0,0 +1,16 @@
+if { [info exists CHIPNAME] } {
+       set _CHIPNAME $_CHIPNAME
+} else {
+       set _CHIPNAME ar2313
+}
+
+if { [info exists CPUTAPID] } {
+       set _CPUTAPID $CPUTAPID
+} else {
+       set _CPUTAPID 0x00000001
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME mips_m4k -endian big -chain-position $_TARGETNAME

-- 

------------------------------------------------------------------------------
_______________________________________________
OpenOCD-devel mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/openocd-devel

Reply via email to