On 16/09/15 02:07, Angus Gratton wrote: > On Tue, Sep 15, 2015 at 06:16:49PM +0200, Andrzej Telszewski wrote: >> It's not about the bad SWD connection, but rather about the bug in the >> chip. The chip is: nRF51822 QFAACA. >> >> The problem is that, in some revisions of the chip, if you enter >> SYSTEMOFF mode, it's not possible for the debugger to connect to the >> chip any more. To connect again, you either have to wake-up the chip or >> recover the chip using Nordic's nrfjprog. > > Thanks for explaining. > > In addition to checking for a zero read result and erroring out cleanly if > that happens, is seems to me that a good long-term fix for this problem would > be to have openocd detect and recover from a SYSTEMOFF state, as part of > either the nrf examine routine or the reset routine. > > Do you know anything about the recovery steps that nrfjprog does to wake up > the chip?
OK, I dug up an old conversation with the Nordic and I'll try to give you some hints;) First a little bit of theory. If I remember well, the problem with SYSTEMOFF is that, once you enter it, the debugger loses the connection with the CPU. You can leave the SYSTEMOFF if you have interrupt configured on some of the GPIOs. Actually this is the way probably all the applications using nRF51 are designed: when the device is switched off, the chip remains in SYSTEMOFF, you press a button (GPIO with interrupt) and you wake-up the chip and it does what it does;) This is also the way to allow the debugger to connect again: once the chip is woken up, the debugger can connect again. The problem appears if you enter SYSTEMOFF, but you forget to configure the GPIO wake-up... normally that bricks the chip. And then the recovery procedure comes into play. The recovery consists of waking up the chip and performing flash ERASEALL, so your unluckily coded SYSTEMOFF instruction does not execute over and over. The procedure to wake the chip up and enter the debug mode is to apply a pulse low on the reset pin (SWDIO) and then you follow the procedure described in section 11.1.2 of the nRF51 Series Reference Manual. Now you should be able to perform the ERASEALL. Another notes (OpenOCD might already be doing it like that, if so, then sorry for disturbing): 1) after you've programmed the chip, the debug interface remains active and SWDIO cannot be used to reset the chip, to do so, you have to set NRF_POWER->RESET=1. 2) Setting NRF_POWER->RESET=1 has only effect if you're in debug mode, other than the, the setting has no effect. 3) The maximal tested SWD clock is 2 MHz. Higher might work, but is not tested. Hope this helps. -- Best regards, Andrzej Telszewski ------------------------------------------------------------------------------ _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
