This is an automated email from Gerrit.
Andreas Färber (afaer...@suse.de) just uploaded a new patch set to Gerrit,
which you can find at http://openocd.zylin.com/3007
-- gerrit
commit 56496f73ca9ebff01d0ed3cd3ee8027dbf836470
Author: Andreas Färber <afaer...@suse.de>
Date: Sun Oct 11 02:06:00 2015 +0200
fm4: Split out S6E2CC family config
Its memory layout is different from MB9BFxxx.
Change-Id: I39c9f9cf582cd182971a9f83bb88c7a18da6cf15
Signed-off-by: Andreas Färber <afaer...@suse.de>
diff --git a/tcl/board/spansion_sk-fm4-176l-s6e2cc.cfg
b/tcl/board/spansion_sk-fm4-176l-s6e2cc.cfg
index 6d80507..4b23146 100644
--- a/tcl/board/spansion_sk-fm4-176l-s6e2cc.cfg
+++ b/tcl/board/spansion_sk-fm4-176l-s6e2cc.cfg
@@ -10,9 +10,10 @@ source [find interface/cmsis-dap.cfg]
# There's also an unpopulated 10-pin 0.05" pinout.
#
-# FM4 S6E2CCAJ0A
+# FM4 S6E2CCAJ0A w/ 192 KB SRAM0
#
set CHIPNAME s6e2cc
-source [find target/fm4.cfg]
+set WORKAREASIZE 0x30000
+source [find target/fm4_s6e2cc.cfg]
reset_config srst_only
diff --git a/tcl/target/fm4_s6e2cc.cfg b/tcl/target/fm4_s6e2cc.cfg
new file mode 100644
index 0000000..18cc630
--- /dev/null
+++ b/tcl/target/fm4_s6e2cc.cfg
@@ -0,0 +1,15 @@
+#
+# Spansion FM4 S6E2CC (ARM Cortex-M4)
+#
+
+source [find target/fm4.cfg]
+
+# S6E2CC8 H/J/L have 96 KB SRAM0
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x18000
+}
+
+$_TARGETNAME configure -work-area-phys [expr 0x20000000 - $_WORKAREASIZE] \
+ -work-area-size $_WORKAREASIZE -work-area-backup 0
--
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