This is an automated email from Gerrit. Felipe Balbi ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/3016
-- gerrit commit de97f766e8331303a916ccf8e031d2ce5f644755 Author: Felipe Balbi <[email protected]> Date: Tue Oct 13 12:27:25 2015 -0500 target: am437x: enable cortex-m3 target AM437x device have a cortex-m3 core in the same SoC which is used for power management. Let's enable that little core so we can debug the Firmware running on that. Change-Id: I0611ff2f318319f6435cd268cea54ce7442b24ee Signed-off-by: Felipe Balbi <[email protected]> diff --git a/tcl/target/am437x.cfg b/tcl/target/am437x.cfg index 507d51e..d961b0e 100644 --- a/tcl/target/am437x.cfg +++ b/tcl/target/am437x.cfg @@ -447,17 +447,7 @@ set JRC_NAME $_CHIPNAME.$JRC_MODULE set DEBUGSS_NAME $_CHIPNAME.$DEBUGSS_MODULE set M3_NAME $_CHIPNAME.$M3_MODULE set _TARGETNAME $_CHIPNAME.mpuss - -# -# M3 WakeupSS DAP -# -if { [info exists M3_DAP_TAPID] } { - set _M3_DAP_TAPID $M3_DAP_TAPID -} else { - set _M3_DAP_TAPID 0x4b6b902f -} -jtag newtap $_CHIPNAME $M3_MODULE -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable -jtag configure $M3_NAME -event tap-enable "icepick_d_tapenable $JRC_NAME 11 0" +set _TARGETNAME2 $_CHIPNAME.m3 # # DebugSS DAP @@ -471,6 +461,17 @@ jtag newtap $_CHIPNAME $DEBUGSS_MODULE -irlen 4 -ircapture 0x1 -irmask 0xf -expe jtag configure $DEBUGSS_NAME -event tap-enable "icepick_d_tapenable $JRC_NAME 12 0" # +# M3 WakeupSS DAP +# +if { [info exists M3_DAP_TAPID] } { + set _M3_DAP_TAPID $M3_DAP_TAPID +} else { + set _M3_DAP_TAPID 0x4b6b902f +} +jtag newtap $_CHIPNAME $M3_MODULE -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable +jtag configure $M3_NAME -event tap-enable "icepick_d_tapenable $JRC_NAME 11 0" + +# # ICEpick-D (JTAG route controller) # if { [info exists JRC_TAPID] } { @@ -479,19 +480,35 @@ if { [info exists JRC_TAPID] } { set _JRC_TAPID 0x0b98c02f } jtag newtap $_CHIPNAME $JRC_MODULE -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version -jtag configure $JRC_NAME -event setup "jtag tapenable $DEBUGSS_NAME" - # some TCK tycles are required to activate the DEBUG power domain +jtag configure $JRC_NAME -event setup "enable_all_taps" +# some TCK tycles are required to activate the DEBUG power domain jtag configure $JRC_NAME -event post-reset "runtest 100" # +# Cortex M3 target +# +target create $_TARGETNAME2 cortex_m -chain-position $M3_NAME + +# # Cortex A9 target # target create $_TARGETNAME cortex_a -chain-position $DEBUGSS_NAME -coreid 0 -dbgbase 0x80000000 - # SRAM: 256K at 0x4030.0000 $_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x40000 +# Enable all taps +proc enable_all_taps { } { + global DEBUGSS_NAME + global M3_NAME + + set ALL_TAPS "$DEBUGSS_NAME $M3_NAME" + + foreach tap $ALL_TAPS { + jtag tapenable $tap + } +} + # Disables watchdog timer after reset otherwise board won't stay in # halted state. proc disable_watchdog { } { -- ------------------------------------------------------------------------------ _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
